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authorUwe Hermann <uwe@hermann-uwe.de>2010-11-14 20:10:11 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2010-11-14 20:10:11 +0000
commit0675d5c34f90d0b2a3864d0f30461dfe696374f0 (patch)
tree148ca976cda1859cf53fb9a7a7ebb9dc44eb2130 /src/mainboard/msi
parent727edb0b320e46acc8ab272fdec87e6444203bfe (diff)
downloadcoreboot-0675d5c34f90d0b2a3864d0f30461dfe696374f0.tar.xz
CK804/MCP55 devicetree.cb cosmetic and indentation fixes.
Add a few more comments for the entries, and also change the devicetree.cb files to the more compact and better readable variant with indentation level of 2 spaces (instead of random mix of tabs and spaces). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6071 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/msi')
-rw-r--r--src/mainboard/msi/ms7135/devicetree.cb17
-rw-r--r--src/mainboard/msi/ms7260/devicetree.cb56
-rw-r--r--src/mainboard/msi/ms9282/devicetree.cb353
-rw-r--r--src/mainboard/msi/ms9652_fam10/devicetree.cb299
4 files changed, 359 insertions, 366 deletions
diff --git a/src/mainboard/msi/ms7135/devicetree.cb b/src/mainboard/msi/ms7135/devicetree.cb
index c431816db5..e796b94650 100644
--- a/src/mainboard/msi/ms7135/devicetree.cb
+++ b/src/mainboard/msi/ms7135/devicetree.cb
@@ -1,14 +1,13 @@
chip northbridge/amd/amdk8/root_complex # Root complex
- device lapic_cluster 0 on # APIC cluster
- chip cpu/amd/socket_754 # Socket 754 CPU
- device lapic 0 on end # APIC
+ device lapic_cluster 0 on # (L)APIC cluster
+ chip cpu/amd/socket_754 # CPU socket
+ device lapic 0 on end # Local APIC of the CPU
end
end
device pci_domain 0 on # PCI domain
- chip northbridge/amd/amdk8 # mc0
- device pci 18.0 on # Northbridge
- # Devices on link 0, link 0 == LDT 0
+ chip northbridge/amd/amdk8 # Northbridge / RAM controller
+ device pci 18.0 on # Link 0 == LDT 0
chip southbridge/nvidia/ck804 # Southbridge
device pci 0.0 on end # HT
device pci 1.0 on # LPC
@@ -52,14 +51,14 @@ chip northbridge/amd/amdk8/root_complex # Root complex
device pci 2.0 on end # USB 1.1
device pci 2.1 on end # USB 2
device pci 4.0 on end # Onboard audio (ACI)
- device pci 4.1 off end # Onboard modem (MCI) -- not wired out
+ device pci 4.1 off end # Onboard modem (MCI), N/A
device pci 6.0 on end # IDE
device pci 7.0 on end # SATA 1
device pci 8.0 on end # SATA 0
device pci 9.0 on end # PCI
device pci a.0 on end # NIC
- device pci b.0 off end # PCI E 3 -- not wired out
- device pci c.0 off end # PCI E 2 -- not wired out
+ device pci b.0 off end # PCI E 3 (N/A)
+ device pci c.0 off end # PCI E 2 (N/A)
device pci d.0 on end # PCI E 1
device pci e.0 on end # PCI E 0
register "ide0_enable" = "1"
diff --git a/src/mainboard/msi/ms7260/devicetree.cb b/src/mainboard/msi/ms7260/devicetree.cb
index 4c4f855ba4..ff7894ead8 100644
--- a/src/mainboard/msi/ms7260/devicetree.cb
+++ b/src/mainboard/msi/ms7260/devicetree.cb
@@ -1,13 +1,12 @@
chip northbridge/amd/amdk8/root_complex # Root complex
- device lapic_cluster 0 on # APIC cluster
- chip cpu/amd/socket_AM2 # CPU
- device lapic 0 on end # APIC
+ device lapic_cluster 0 on # (L)APIC cluster
+ chip cpu/amd/socket_AM2 # CPU socket
+ device lapic 0 on end # Local APIC of the CPU
end
end
device pci_domain 0 on # PCI domain
- chip northbridge/amd/amdk8 # Northbridge / mc0
- device pci 18.0 on
- # Devices on link 0, link 0 == LDT 0
+ chip northbridge/amd/amdk8 # Northbridge / RAM controller
+ device pci 18.0 on # Link 0 == LDT 0
chip southbridge/nvidia/mcp55 # Southbridge
device pci 0.0 on end # HT
device pci 1.0 on # LPC
@@ -83,19 +82,19 @@ chip northbridge/amd/amdk8/root_complex # Root complex
end
# TODO: Check if the stuff below is correct / needed.
device pci 1.1 on # SM 1
- # PCI device SMBus address will depend on addon PCI device,
- # do we need to scan_smbus_bus?
-
- # chip drivers/generic/generic # PCIXA Slot1
+ # PCI device SMBus address will
+ # depend on addon PCI device, do
+ # we need to scan_smbus_bus?
+ # chip drivers/generic/generic # PCIXA slot 1
# device i2c 50 on end
# end
- # chip drivers/generic/generic # PCIXB Slot1
+ # chip drivers/generic/generic # PCIXB slot 1
# device i2c 51 on end
# end
- # chip drivers/generic/generic # PCIXB Slot2
+ # chip drivers/generic/generic # PCIXB slot 2
# device i2c 52 on end
# end
- # chip drivers/generic/generic # PCI Slot1
+ # chip drivers/generic/generic # PCI slot 1
# device i2c 53 on end
# end
# chip drivers/generic/generic # Master MCP55 PCI-E
@@ -128,7 +127,8 @@ chip northbridge/amd/amdk8/root_complex # Root complex
register "sata0_enable" = "1"
register "sata1_enable" = "1"
# TODO: Check the two lines below.
- register "mac_eeprom_smbus" = "3" # 1: SMBus under 2e.8, 2: SM0 3: SM1
+ # 1: SMBus under 2e.8, 2: SM0 3: SM1
+ register "mac_eeprom_smbus" = "3"
register "mac_eeprom_addr" = "0x51"
end
end
@@ -139,19 +139,17 @@ chip northbridge/amd/amdk8/root_complex # Root complex
device pci 18.3 on end
end
end
-
-# TODO
-# chip drivers/generic/debug
-# device pnp 0.0 off end # chip name
-# device pnp 0.1 on end # pci_regs_all
-# device pnp 0.2 on end # mem
-# device pnp 0.3 off end # cpuid
-# device pnp 0.4 on end # smbus_regs_all
-# device pnp 0.5 off end # dual core msr
-# device pnp 0.6 off end # cache size
-# device pnp 0.7 off end # tsc
-# device pnp 0.8 off end # io
-# device pnp 0.9 off end # io
-# end
-
+ # TODO
+ # chip drivers/generic/debug
+ # device pnp 0.0 off end # chip name
+ # device pnp 0.1 on end # pci_regs_all
+ # device pnp 0.2 on end # mem
+ # device pnp 0.3 off end # cpuid
+ # device pnp 0.4 on end # smbus_regs_all
+ # device pnp 0.5 off end # dual core msr
+ # device pnp 0.6 off end # cache size
+ # device pnp 0.7 off end # tsc
+ # device pnp 0.8 off end # io
+ # device pnp 0.9 off end # io
+ # end
end
diff --git a/src/mainboard/msi/ms9282/devicetree.cb b/src/mainboard/msi/ms9282/devicetree.cb
index 7159ec0fbc..a4a4f6563c 100644
--- a/src/mainboard/msi/ms9282/devicetree.cb
+++ b/src/mainboard/msi/ms9282/devicetree.cb
@@ -1,181 +1,176 @@
-chip northbridge/amd/amdk8/root_complex
- device lapic_cluster 0 on
- chip cpu/amd/socket_F
- device lapic 0 on end
+chip northbridge/amd/amdk8/root_complex # Root complex
+ device lapic_cluster 0 on # (L)APIC cluster
+ chip cpu/amd/socket_F # CPU socket
+ device lapic 0 on end # Local APIC of the CPU
+ end
+ end
+ device pci_domain 0 on # PCI domain
+ chip northbridge/amd/amdk8 # Northbridge / RAM controller
+ device pci 18.0 on # Link 0 == LDT 0
+ chip southbridge/nvidia/mcp55 # Southbridge
+ device pci 0.0 on end # HT
+ device pci 1.0 on # LPC
+ chip superio/winbond/w83627ehg # Super I/O
+ device pnp 2e.0 on # Floppy
+ io 0x60 = 0x3f0
+ irq 0x70 = 6
+ drq 0x74 = 2
+ end
+ device pnp 2e.1 off # Parallel port
+ io 0x60 = 0x378
+ irq 0x70 = 7
+ end
+ device pnp 2e.2 on # Com1
+ io 0x60 = 0x3f8
+ irq 0x70 = 4
+ end
+ device pnp 2e.3 off # Com2
+ io 0x60 = 0x2f8
+ irq 0x70 = 3
+ end
+ device pnp 2e.5 on # PS/2 keyboard
+ io 0x60 = 0x60
+ io 0x62 = 0x64
+ irq 0x70 = 1
+ irq 0x72 = 12
+ end
+ device pnp 2e.6 off # Serial flash
+ io 0x60 = 0x100
+ end
+ device pnp 2e.7 off # Game port, MIDI, GPIO1
+ io 0x60 = 0x220
+ io 0x62 = 0x300
+ irq 0x70 = 9
+ end
+ device pnp 2e.8 off end # WDTO PLED
+ device pnp 2e.9 off end # GPIO2, GPIO3, GPIO4, GPIO5
+ device pnp 2e.a off end # ACPI
+ device pnp 2e.b on # Hardware monitor
+ io 0x60 = 0x290
+ irq 0x70 = 5
+ end
+ end
+ end
+ device pci 1.1 on # SM 0
+ chip drivers/i2c/i2cmux2 # PCA9554 SMBus mux
+ device i2c 70 on # 0 pca9554 1
+ chip drivers/generic/generic # DIMM 0-0-0
+ device i2c 50 on end
end
+ chip drivers/generic/generic # DIMM 0-0-1
+ device i2c 51 on end
+ end
+ chip drivers/generic/generic # DIMM 0-1-0
+ device i2c 52 on end
+ end
+ chip drivers/generic/generic # DIMM 0-1-1
+ device i2c 53 on end
+ end
+ chip drivers/generic/generic # DIMM 0-0-0
+ device i2c 54 on end
+ end
+ chip drivers/generic/generic # DIMM 0-0-1
+ device i2c 55 on end
+ end
+ chip drivers/generic/generic # DIMM 0-1-0
+ device i2c 56 on end
+ end
+ chip drivers/generic/generic # DIMM 0-1-1
+ device i2c 57 on end
+ end
+ end
+ device i2c 70 on # 0 pca9554 2
+ chip drivers/generic/generic # DIMM 0-0-0
+ device i2c 50 on end
+ end
+ chip drivers/generic/generic # DIMM 0-0-1
+ device i2c 51 on end
+ end
+ chip drivers/generic/generic # DIMM 0-1-0
+ device i2c 52 on end
+ end
+ chip drivers/generic/generic # DIMM 0-1-1
+ device i2c 53 on end
+ end
+ chip drivers/generic/generic # DIMM 0-0-0
+ device i2c 54 on end
+ end
+ chip drivers/generic/generic # DIMM 0-0-1
+ device i2c 55 on end
+ end
+ chip drivers/generic/generic # DIMM 0-1-0
+ device i2c 56 on end
+ end
+ chip drivers/generic/generic # DIMM 0-1-1
+ device i2c 57 on end
+ end
+ end
+ end
+ end
+ device pci 1.1 on # SM 1
+ chip drivers/i2c/i2cmux2 # pca9554 SMBus mux
+ device i2c 72 on # PCA9554 channel 1
+ chip drivers/i2c/adm1027 # HWM ADT7476 1
+ device i2c 2e on end
+ end
+ end
+ device i2c 72 on # PCA9545 channel 2
+ chip drivers/i2c/adm1027 # HWM ADT7463
+ device i2c 2e on end
+ end
+ end
+ device i2c 72 on end # PCA9545 channel 3
+ device i2c 72 on # PCA9545 channel 4
+ chip drivers/i2c/adm1027 # HWM ADT7476 2
+ device i2c 2e on end
+ end
+ end
+ end
+ end
+ device pci 2.0 on end # USB 1.1
+ device pci 2.1 on end # USB 2
+ device pci 4.0 on end # IDE
+ device pci 5.0 on end # SATA 0
+ device pci 5.1 on end # SATA 1
+ device pci 5.2 on end # SATA 2
+ device pci 6.0 on # P2P
+ device pci 4.0 on end
+ end
+ device pci 7.0 on end # reserve
+ device pci 8.0 on end # MAC0
+ device pci 9.0 on end # MAC1
+ device pci a.0 on
+ device pci 0.0 on
+ device pci 4.0 on end # PCI-E LAN1
+ device pci 4.1 on end # PCI-E LAN2
+ end
+ end # 0x376
+ device pci b.0 on end # PCI E 0x374
+ device pci c.0 on end
+ device pci d.0 on # SAS
+ device pci 0.0 on end
+ end # PCI E 1 0x378
+ device pci e.0 on end # PCI E 0 0x375
+ device pci f.0 on end # PCI E 0x377, PCI-E slot
+ register "ide0_enable" = "1"
+ register "ide1_enable" = "1"
+ register "sata0_enable" = "1"
+ register "sata1_enable" = "1"
end
-
- device pci_domain 0 on
- chip northbridge/amd/amdk8 #mc0
- device pci 18.0 on # northbridge
- # devices on link 0, link 0 == LDT 0
- chip southbridge/nvidia/mcp55
- device pci 0.0 on end # HT
- device pci 1.0 on # LPC
- chip superio/winbond/w83627ehg
- device pnp 2e.0 on # Floppy
- io 0x60 = 0x3f0
- irq 0x70 = 6
- drq 0x74 = 2
- end
- device pnp 2e.1 off # Parallel Port
- io 0x60 = 0x378
- irq 0x70 = 7
- end
- device pnp 2e.2 on # Com1
- io 0x60 = 0x3f8
- irq 0x70 = 4
- end
- device pnp 2e.3 off # Com2
- io 0x60 = 0x2f8
- irq 0x70 = 3
- end
- device pnp 2e.5 on # Keyboard
- io 0x60 = 0x60
- io 0x62 = 0x64
- irq 0x70 = 1
- irq 0x72 = 12
- end
- device pnp 2e.6 off # SERIAL_FALSH
- io 0x60 = 0x100
- end
- device pnp 2e.7 off # GAME_MIDI_GIPO1
- io 0x60 = 0x220
- io 0x62 = 0x300
- irq 0x70 = 9
- end
- device pnp 2e.8 off end # WDTO_PLED
- device pnp 2e.9 off end # GPIO2_GPIO3_GPIO4_GPIO5
- device pnp 2e.a off end # ACPI
- device pnp 2e.b on # HW Monitor
- io 0x60 = 0x290
- irq 0x70 = 5
- end
- end
- end
- device pci 1.1 on # SM 0
- chip drivers/i2c/i2cmux2 # pca9554 smbus mux
- device i2c 70 on #0 pca9554 1
- chip drivers/generic/generic #dimm 0-0-0
- device i2c 50 on end
- end
- chip drivers/generic/generic #dimm 0-0-1
- device i2c 51 on end
- end
- chip drivers/generic/generic #dimm 0-1-0
- device i2c 52 on end
- end
- chip drivers/generic/generic #dimm 0-1-1
- device i2c 53 on end
- end
- chip drivers/generic/generic #dimm 0-0-0
- device i2c 54 on end
- end
- chip drivers/generic/generic #dimm 0-0-1
- device i2c 55 on end
- end
- chip drivers/generic/generic #dimm 0-1-0
- device i2c 56 on end
- end
- chip drivers/generic/generic #dimm 0-1-1
- device i2c 57 on end
- end
- end
- device i2c 70 on #0 pca9554 2
- chip drivers/generic/generic #dimm 0-0-0
- device i2c 50 on end
- end
- chip drivers/generic/generic #dimm 0-0-1
- device i2c 51 on end
- end
- chip drivers/generic/generic #dimm 0-1-0
- device i2c 52 on end
- end
- chip drivers/generic/generic #dimm 0-1-1
- device i2c 53 on end
- end
- chip drivers/generic/generic #dimm 0-0-0
- device i2c 54 on end
- end
- chip drivers/generic/generic #dimm 0-0-1
- device i2c 55 on end
- end
- chip drivers/generic/generic #dimm 0-1-0
- device i2c 56 on end
- end
- chip drivers/generic/generic #dimm 0-1-1
- device i2c 57 on end
- end
- end
- end
- end
- device pci 1.1 on # SM 1
- chip drivers/i2c/i2cmux2 # pca9554 smbus mux
- device i2c 72 on #pca9554 channle1
- chip drivers/i2c/adm1027 #HWM ADT7476 1
- device i2c 2e on end
- end
- end
- device i2c 72 on #pca9545 channel 2
- chip drivers/i2c/adm1027 #HWM ADT7463
- device i2c 2e on end
- end
- end
- device i2c 72 on end #pca9545 channel 3
- device i2c 72 on #pca9545 channel 4
- chip drivers/i2c/adm1027 #HWM ADT7476 2
- device i2c 2e on end
- end
- end
- end
- end
-
- device pci 2.0 on end # USB 1.1
- device pci 2.1 on end # USB 2
- device pci 4.0 on end # IDE
- device pci 5.0 on end # SATA 0
- device pci 5.1 on end # SATA 1
- device pci 5.2 on end # SATA 2
- device pci 6.0 on #P2P
- device pci 4.0 on end
- end # P2P
- device pci 7.0 on end # reserve
- device pci 8.0 on end # MAC0
- device pci 9.0 on end # MAC1
- device pci a.0 on
- device pci 0.0 on
- device pci 4.0 on end #pci_E lan1
- device pci 4.1 on end #pci_E lan2
- end
- end # 0x376
- device pci b.0 on end # PCI E 0x374
- device pci c.0 on end
- device pci d.0 on #SAS
- device pci 0.0 on end
- end # PCI E 1 0x378
- device pci e.0 on end # PCI E 0 0x375
- device pci f.0 on end #PCI E 0x377 pci_E slot
- register "ide0_enable" = "1"
- register "ide1_enable" = "1"
- register "sata0_enable" = "1"
- register "sata1_enable" = "1"
- end
- end # device pci 18.0
- device pci 18.0 on end # Link 1
- device pci 18.0 on end
- device pci 18.1 on end
- device pci 18.2 on end
- device pci 18.3 on end
- end #mc0
-
- end # pci_domain
-
-# chip drivers/generic/debug
-# device pnp 0.0 off end
-# device pnp 0.1 off end
-# device pnp 0.2 off end
-# device pnp 0.3 off end
-# device pnp 0.4 off end
-# device pnp 0.5 on end
-# end
-end # root_complex
+ end
+ device pci 18.0 on end # Link 1
+ device pci 18.0 on end
+ device pci 18.1 on end
+ device pci 18.2 on end
+ device pci 18.3 on end
+ end
+ end
+ # chip drivers/generic/debug
+ # device pnp 0.0 off end
+ # device pnp 0.1 off end
+ # device pnp 0.2 off end
+ # device pnp 0.3 off end
+ # device pnp 0.4 off end
+ # device pnp 0.5 on end
+ # end
+end
diff --git a/src/mainboard/msi/ms9652_fam10/devicetree.cb b/src/mainboard/msi/ms9652_fam10/devicetree.cb
index b619acb332..29756f1dcd 100644
--- a/src/mainboard/msi/ms9652_fam10/devicetree.cb
+++ b/src/mainboard/msi/ms9652_fam10/devicetree.cb
@@ -21,152 +21,153 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
-chip northbridge/amd/amdfam10/root_complex
- device lapic_cluster 0 on
- chip cpu/amd/socket_F_1207
- device lapic 0 on end
- end
- end
- device pci_domain 0 on
- chip northbridge/amd/amdfam10 #mc0
- device pci 18.0 on # SB on HT link 0.0
- chip southbridge/nvidia/mcp55
- device pci 0.0 on end # HT
- device pci 1.0 on # LPC
- chip superio/winbond/w83627ehg
- device pnp 2e.0 on # Floppy
- io 0x60 = 0x3f0
- irq 0x70 = 6
- drq 0x74 = 2
- end
- device pnp 2e.1 off # Parallel Port
- io 0x60 = 0x378
- irq 0x70 = 7
- end
- device pnp 2e.2 on # Com1
- io 0x60 = 0x3f8
- irq 0x70 = 4
- end
- device pnp 2e.3 on # Com2
- io 0x60 = 0x2f8
- irq 0x70 = 3
- end
- device pnp 2e.5 on # Keyboard
- io 0x60 = 0x60
- io 0x62 = 0x64
- irq 0x70 = 1
- irq 0x72 = 12
- end
- device pnp 2e.6 off # SERIAL_FLASH
- io 0x60 = 0x100
- end
- device pnp 2e.7 off # GAME_MIDI_GIPO1
- io 0x60 = 0x220
- io 0x62 = 0x300
- irq 0x70 = 9
- end
- device pnp 2e.8 off end # WDTO_PLED
- device pnp 2e.9 off end # GPIO2_GPIO3_GPIO4_GPIO5
- device pnp 2e.a off end # ACPI
- device pnp 2e.b on # HW Monitor
- io 0x60 = 0x290
- irq 0x70 = 5
- end
- device pnp 2e.106 off # Serial flash
- io 0x60 = 0x100
- end
- device pnp 2e.207 on # MIDI
- io 0x62 = 0x330
- irq 0x70 = 0xa
- end
- end
- end
- device pci 1.1 on # SM 0
- chip drivers/generic/generic #dimm 0-0-0
- device i2c 50 on end
- end
- chip drivers/generic/generic #dimm 0-0-1
- device i2c 51 on end
- end
- chip drivers/generic/generic #dimm 0-1-0
- device i2c 52 on end
- end
- chip drivers/generic/generic #dimm 0-1-1
- device i2c 53 on end
- end
- chip drivers/generic/generic #dimm 1-0-0
- device i2c 54 on end
- end
- chip drivers/generic/generic #dimm 1-0-1
- device i2c 55 on end
- end
- chip drivers/generic/generic #dimm 1-1-0
- device i2c 56 on end
- end
- chip drivers/generic/generic #dimm 1-1-1
- device i2c 57 on end
- end
- end # SM
- device pci 1.1 on # SM 1
-#PCI device smbus address will depend on addon pci device, do we need to scan_smbus_bus?
-# chip drivers/generic/generic #PCIXA Slot1
-# device i2c 50 on end
-# end
-# chip drivers/generic/generic #PCIXB Slot1
-# device i2c 51 on end
-# end
-# chip drivers/generic/generic #PCIXB Slot2
-# device i2c 52 on end
-# end
-# chip drivers/generic/generic #PCI Slot1
-# device i2c 53 on end
-# end
-# chip drivers/generic/generic #Master MCP55 PCI-E
-# device i2c 54 on end
-# end
-# chip drivers/generic/generic #Slave MCP55 PCI-E
-# device i2c 55 on end
-# end
-# chip drivers/generic/generic #MAC EEPROM
-# device i2c 51 on end
-# end
- end # SM
- device pci 2.0 on end # USB 1.1
- device pci 2.1 on end # USB 2
- device pci 4.0 on end # IDE
- device pci 5.0 on end # SATA 0
- device pci 5.1 on end # SATA 1
- device pci 5.2 on end # SATA 2
- device pci 6.1 on end # AZA
- device pci 8.0 on end # NIC
- device pci 9.0 on end # NIC
- register "ide0_enable" = "1"
- register "sata0_enable" = "1"
- register "sata1_enable" = "1"
- register "mac_eeprom_smbus" = "3" # 1: smbus under 2e.8, 2: SM0 3: SM1
- register "mac_eeprom_addr" = "0x51"
- end
- end # device pci 18.0
- device pci 18.0 on end # HT 1.0
- device pci 18.0 on end # HT 2.0
- device pci 18.1 on end
- device pci 18.2 on end
- device pci 18.3 on end
- device pci 18.4 on end
- end # mc0
-
- end # PCI domain
-
-# chip drivers/generic/debug
-# device pnp 0.0 off end # chip name
-# device pnp 0.1 on end # pci_regs_all
-# device pnp 0.2 on end # mem
-# device pnp 0.3 off end # cpuid
-# device pnp 0.4 on end # smbus_regs_all
-# device pnp 0.5 off end # dual core msr
-# device pnp 0.6 off end # cache size
-# device pnp 0.7 off end # tsc
-# device pnp 0.8 off end # io
-# device pnp 0.9 off end # io
-# end
-end #root_complex
+chip northbridge/amd/amdfam10/root_complex # Root complex
+ device lapic_cluster 0 on # (L)APIC cluster
+ chip cpu/amd/socket_F_1207 # CPU socket
+ device lapic 0 on end # Local APIC of the CPU
+ end
+ end
+ device pci_domain 0 on # PCI domain
+ chip northbridge/amd/amdfam10 # Northbridge / RAM controller
+ device pci 18.0 on # Link 0
+ chip southbridge/nvidia/mcp55 # Southbridge
+ device pci 0.0 on end # HT
+ device pci 1.0 on # LPC
+ chip superio/winbond/w83627ehg # Super I/O
+ device pnp 2e.0 on # Floppy
+ io 0x60 = 0x3f0
+ irq 0x70 = 6
+ drq 0x74 = 2
+ end
+ device pnp 2e.1 off # Parallel port
+ io 0x60 = 0x378
+ irq 0x70 = 7
+ end
+ device pnp 2e.2 on # Com1
+ io 0x60 = 0x3f8
+ irq 0x70 = 4
+ end
+ device pnp 2e.3 on # Com2
+ io 0x60 = 0x2f8
+ irq 0x70 = 3
+ end
+ device pnp 2e.5 on # PS/2 keyboard
+ io 0x60 = 0x60
+ io 0x62 = 0x64
+ irq 0x70 = 1
+ irq 0x72 = 12
+ end
+ device pnp 2e.6 off # Serial flash
+ io 0x60 = 0x100
+ end
+ device pnp 2e.7 off # Game port, MIDI, GPIO1
+ io 0x60 = 0x220
+ io 0x62 = 0x300
+ irq 0x70 = 9
+ end
+ device pnp 2e.8 off end # WDTO PLED
+ device pnp 2e.9 off end # GPIO2, GPIO3, GPIO4, GPIO5
+ device pnp 2e.a off end # ACPI
+ device pnp 2e.b on # Hardware monitor
+ io 0x60 = 0x290
+ irq 0x70 = 5
+ end
+ device pnp 2e.106 off # Serial flash
+ io 0x60 = 0x100
+ end
+ device pnp 2e.207 on # MIDI
+ io 0x62 = 0x330
+ irq 0x70 = 0xa
+ end
+ end
+ end
+ device pci 1.1 on # SM 0
+ chip drivers/generic/generic # DIMM 0-0-0
+ device i2c 50 on end
+ end
+ chip drivers/generic/generic # DIMM 0-0-1
+ device i2c 51 on end
+ end
+ chip drivers/generic/generic # DIMM 0-1-0
+ device i2c 52 on end
+ end
+ chip drivers/generic/generic # DIMM 0-1-1
+ device i2c 53 on end
+ end
+ chip drivers/generic/generic # DIMM 1-0-0
+ device i2c 54 on end
+ end
+ chip drivers/generic/generic # DIMM 1-0-1
+ device i2c 55 on end
+ end
+ chip drivers/generic/generic # DIMM 1-1-0
+ device i2c 56 on end
+ end
+ chip drivers/generic/generic # DIMM 1-1-1
+ device i2c 57 on end
+ end
+ end
+ device pci 1.1 on # SM 1
+ # PCI device SMBus address will
+ # depend on addon PCI device, do
+ # we need to scan_smbus_bus?
+ # chip drivers/generic/generic # PCIXA slot 1
+ # device i2c 50 on end
+ # end
+ # chip drivers/generic/generic # PCIXB slot 1
+ # device i2c 51 on end
+ # end
+ # chip drivers/generic/generic # PCIXB slot 2
+ # device i2c 52 on end
+ # end
+ # chip drivers/generic/generic # PCI slot 1
+ # device i2c 53 on end
+ # end
+ # chip drivers/generic/generic # Master MCP55 PCI-E
+ # device i2c 54 on end
+ # end
+ # chip drivers/generic/generic # Slave MCP55 PCI-E
+ # device i2c 55 on end
+ # end
+ # chip drivers/generic/generic # MAC EEPROM
+ # device i2c 51 on end
+ # end
+ end
+ device pci 2.0 on end # USB 1.1
+ device pci 2.1 on end # USB 2
+ device pci 4.0 on end # IDE
+ device pci 5.0 on end # SATA 0
+ device pci 5.1 on end # SATA 1
+ device pci 5.2 on end # SATA 2
+ device pci 6.1 on end # AZA
+ device pci 8.0 on end # NIC
+ device pci 9.0 on end # NIC
+ register "ide0_enable" = "1"
+ register "sata0_enable" = "1"
+ register "sata1_enable" = "1"
+ # 1: SMBus under 2e.8, 2: SM0 3: SM1
+ register "mac_eeprom_smbus" = "3"
+ register "mac_eeprom_addr" = "0x51"
+ end
+ end
+ device pci 18.0 on end # HT 1.0
+ device pci 18.0 on end # HT 2.0
+ device pci 18.1 on end
+ device pci 18.2 on end
+ device pci 18.3 on end
+ device pci 18.4 on end
+ end
+ end
+ # chip drivers/generic/debug
+ # device pnp 0.0 off end # chip name
+ # device pnp 0.1 on end # pci_regs_all
+ # device pnp 0.2 on end # mem
+ # device pnp 0.3 off end # cpuid
+ # device pnp 0.4 on end # smbus_regs_all
+ # device pnp 0.5 off end # dual core msr
+ # device pnp 0.6 off end # cache size
+ # device pnp 0.7 off end # tsc
+ # device pnp 0.8 off end # io
+ # device pnp 0.9 off end # io
+ # end
+end
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-07 23:50:48 +0000