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author | Uwe Hermann <uwe@hermann-uwe.de> | 2010-11-20 20:36:40 +0000 |
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committer | Uwe Hermann <uwe@hermann-uwe.de> | 2010-11-20 20:36:40 +0000 |
commit | 26535d6e28b9c6697ff2865ba0fd6b2b63054f24 (patch) | |
tree | aa4ed95f19cc9d4d100cceeffe6f564fe7082a96 /src/mainboard/msi | |
parent | d773fd370a92a6da2f7dbf91c085eb0df1f6f30d (diff) | |
download | coreboot-26535d6e28b9c6697ff2865ba0fd6b2b63054f24.tar.xz |
Merge all spd_addr.h into the resp. romstage.c files.
Except for one instance the spd_addr.h were now very tiny, there's not
much point in keeping that stuff in an extra file. The only user of those
files is the romstage.c file anyway.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6101 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/msi')
-rw-r--r-- | src/mainboard/msi/ms9652_fam10/romstage.c | 10 | ||||
-rw-r--r-- | src/mainboard/msi/ms9652_fam10/spd_addr.h | 31 |
2 files changed, 9 insertions, 32 deletions
diff --git a/src/mainboard/msi/ms9652_fam10/romstage.c b/src/mainboard/msi/ms9652_fam10/romstage.c index 91de477283..4ee1eebbb3 100644 --- a/src/mainboard/msi/ms9652_fam10/romstage.c +++ b/src/mainboard/msi/ms9652_fam10/romstage.c @@ -33,6 +33,7 @@ #include <console/console.h> #include <usbdebug.h> #include <lib.h> +#include <spd.h> #include <cpu/amd/model_10xxx_rev.h> @@ -116,7 +117,14 @@ static void sio_setup(void) pci_write_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa0, dword); } -#include "spd_addr.h" +static const u8 spd_addr[] = { + //first node + RC00, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0, +#if CONFIG_MAX_PHYSICAL_CPUS > 1 + //second node + RC00, DIMM4, DIMM6, 0, 0, DIMM5, DIMM7, 0, 0, +#endif +}; void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { diff --git a/src/mainboard/msi/ms9652_fam10/spd_addr.h b/src/mainboard/msi/ms9652_fam10/spd_addr.h deleted file mode 100644 index 40c5ac712a..0000000000 --- a/src/mainboard/msi/ms9652_fam10/spd_addr.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -/** This file defines the SPD addresses for the mainboard. */ - -#include <spd.h> - -static const u8 spd_addr[] = { - //first node - RC00, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0, -#if CONFIG_MAX_PHYSICAL_CPUS > 1 - //second node - RC00, DIMM4, DIMM6, 0, 0, DIMM5, DIMM7, 0, 0, -#endif -}; |