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| author | Patrick Georgi <patrick.georgi@coresystems.de> | 2010-10-01 14:50:12 +0000 |
|---|---|---|
| committer | Patrick Georgi <patrick.georgi@coresystems.de> | 2010-10-01 14:50:12 +0000 |
| commit | e82618d03719e1c3f012b6ac227aa4b34ae4950b (patch) | |
| tree | 8b346ea13157962dc040299579101958b9fe738f /src/mainboard/msi | |
| parent | f11b81d18d36ecf732452a861d79ecd75f380adc (diff) | |
| download | coreboot-e82618d03719e1c3f012b6ac227aa4b34ae4950b.tar.xz | |
Move CACHE_AS_RAM_ADDRESS_DEBUG out of romstage.c into Kconfig,
rename it slightly, make it visible only on relevant northbridges,
drop it entirely from via boards (as they seem to have picked it
up from AMD code without using it themselves), and make it
default to false for all boards.
Some romstages used to set this to "true" (ie. "print debug output"),
but I didn't follow up on it in Kconfig - if you need it to debug CAR,
enable it yourself.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5898 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/msi')
| -rw-r--r-- | src/mainboard/msi/ms7260/ap_romstage.c | 1 | ||||
| -rw-r--r-- | src/mainboard/msi/ms7260/romstage.c | 1 | ||||
| -rw-r--r-- | src/mainboard/msi/ms9185/romstage.c | 1 | ||||
| -rw-r--r-- | src/mainboard/msi/ms9282/romstage.c | 1 |
4 files changed, 0 insertions, 4 deletions
diff --git a/src/mainboard/msi/ms7260/ap_romstage.c b/src/mainboard/msi/ms7260/ap_romstage.c index 5b88a6d989..16b47685a6 100644 --- a/src/mainboard/msi/ms7260/ap_romstage.c +++ b/src/mainboard/msi/ms7260/ap_romstage.c @@ -24,7 +24,6 @@ #define __PRE_RAM__ #define RAMINIT_SYSINFO 1 -#define CACHE_AS_RAM_ADDRESS_DEBUG 0 #define SET_NB_CFG_54 1 /* Used by RAM init. */ #define QRANK_DIMM_SUPPORT 1 #define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0 diff --git a/src/mainboard/msi/ms7260/romstage.c b/src/mainboard/msi/ms7260/romstage.c index 908138a5d3..2605a16c3f 100644 --- a/src/mainboard/msi/ms7260/romstage.c +++ b/src/mainboard/msi/ms7260/romstage.c @@ -20,7 +20,6 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -// #define CACHE_AS_RAM_ADDRESS_DEBUG 1 // #define RAM_TIMING_DEBUG 1 // #define DQS_TRAIN_DEBUG 1 // #define RES_DEBUG 1 diff --git a/src/mainboard/msi/ms9185/romstage.c b/src/mainboard/msi/ms9185/romstage.c index a2bf78bf1b..522e2f3e11 100644 --- a/src/mainboard/msi/ms9185/romstage.c +++ b/src/mainboard/msi/ms9185/romstage.c @@ -24,7 +24,6 @@ */ #define RAMINIT_SYSINFO 1 -#define CACHE_AS_RAM_ADDRESS_DEBUG 0 #define SET_NB_CFG_54 1 diff --git a/src/mainboard/msi/ms9282/romstage.c b/src/mainboard/msi/ms9282/romstage.c index ed8ee85647..950f7dca59 100644 --- a/src/mainboard/msi/ms9282/romstage.c +++ b/src/mainboard/msi/ms9282/romstage.c @@ -23,7 +23,6 @@ */ #define RAMINIT_SYSINFO 1 -#define CACHE_AS_RAM_ADDRESS_DEBUG 0 #define SET_NB_CFG_54 1 |