diff options
| author | Eric Biederman <ebiederm@xmission.com> | 2004-11-05 07:26:56 +0000 |
|---|---|---|
| committer | Eric Biederman <ebiederm@xmission.com> | 2004-11-05 07:26:56 +0000 |
| commit | 41d0fa38af010fdb2f9456ae3f693b1cadcc6bd6 (patch) | |
| tree | db01fb79b6e6f98999dc167567f88f40ad2d26d9 /src/mainboard/newisys | |
| parent | 8bd555297e9c8eb8b9a006812f7a64197acff583 (diff) | |
| download | coreboot-41d0fa38af010fdb2f9456ae3f693b1cadcc6bd6.tar.xz | |
- Modify all of the Opteron motherboards to have a separate logical
chip for the amdk8/root_complex
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1750 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/newisys')
| -rw-r--r-- | src/mainboard/newisys/khepri/Config.lb | 109 |
1 files changed, 55 insertions, 54 deletions
diff --git a/src/mainboard/newisys/khepri/Config.lb b/src/mainboard/newisys/khepri/Config.lb index 77e1ec8d05..947180d53e 100644 --- a/src/mainboard/newisys/khepri/Config.lb +++ b/src/mainboard/newisys/khepri/Config.lb @@ -128,68 +128,69 @@ mainboardinit cpu/x86/mmx/disable_mmx.inc dir /pc80 config chip.h -chip northbridge/amd/amdk8 +chip northbridge/amd/amdk8/root_complex device pci_domain 0 on - device pci 18.0 on end # LDT 0 - device pci 18.0 on # LDT 1 - chip southbridge/amd/amd8131 - device pci 0.0 on end - device pci 0.1 on end - device pci 1.0 on end - device pci 1.1 on end - end - chip southbridge/amd/amd8111 - device pci 0.0 on + chip northbridge/amd/amdk8 + device pci 18.0 on end # LDT 0 + device pci 18.0 on # LDT 1 + chip southbridge/amd/amd8131 device pci 0.0 on end device pci 0.1 on end - device pci 0.2 on end device pci 1.0 on end + device pci 1.1 on end end - device pci 1.0 on - chip superio/NSC/pc87360 - device pnp 2e.0 off # Floppy - io 0x60 = 0x3f0 - irq 0x70 = 6 - drq 0x74 = 2 - end - device pnp 2e.1 off # Parallel Port - io 0x60 = 0x378 - irq 0x70 = 7 - end - device pnp 2e.2 off # Com 2 - io 0x60 = 0x2f8 - irq 0x70 = 3 - end - device pnp 2e.3 on # Com 1 - io 0x60 = 0x3f8 - irq 0x70 = 4 - end - device pnp 2e.4 off end # SWC - device pnp 2e.5 off end # Mouse - device pnp 2e.6 on # Keyboard - io 0x60 = 0x60 - io 0x62 = 0x64 - irq 0x70 = 1 + chip southbridge/amd/amd8111 + device pci 0.0 on + device pci 0.0 on end + device pci 0.1 on end + device pci 0.2 on end + device pci 1.0 on end + end + device pci 1.0 on + chip superio/NSC/pc87360 + device pnp 2e.0 off # Floppy + io 0x60 = 0x3f0 + irq 0x70 = 6 + drq 0x74 = 2 + end + device pnp 2e.1 off # Parallel Port + io 0x60 = 0x378 + irq 0x70 = 7 + end + device pnp 2e.2 off # Com 2 + io 0x60 = 0x2f8 + irq 0x70 = 3 + end + device pnp 2e.3 on # Com 1 + io 0x60 = 0x3f8 + irq 0x70 = 4 + end + device pnp 2e.4 off end # SWC + device pnp 2e.5 off end # Mouse + device pnp 2e.6 on # Keyboard + io 0x60 = 0x60 + io 0x62 = 0x64 + irq 0x70 = 1 + end + device pnp 2e.7 off end # GPIO + device pnp 2e.8 off end # ACB + device pnp 2e.9 off end # FSCM + device pnp 2e.a off end # WDT + end - device pnp 2e.7 off end # GPIO - device pnp 2e.8 off end # ACB - device pnp 2e.9 off end # FSCM - device pnp 2e.a off end # WDT - end + device pci 1.1 on end + device pci 1.2 on end + device pci 1.3 on end + device pci 1.5 on end + device pci 1.6 on end end - device pci 1.1 on end - device pci 1.2 on end - device pci 1.3 on end - device pci 1.5 on end - device pci 1.6 on end - end - end # LDT1 - device pci 18.0 on end # LDT2 - device pci 18.1 on end - device pci 18.2 on end - device pci 18.3 on end - + end # LDT1 + device pci 18.0 on end # LDT2 + device pci 18.1 on end + device pci 18.2 on end + device pci 18.3 on end + end chip northbridge/amd/amdk8 device pci 19.0 on end device pci 19.0 on end |