Add support for the Nokia IP530.

It's currently its able to run coreboot + seabios + sgabios.

The following hardware works;
        P3
        i440BX  northbridge
        82371   southbridge
        IDE     normal disks + CF

The following hardware doesn't work:
        4x NIC          21143-PD
        2x PCMCIA       PCI1225PDV

Signed-off-by: Marc Bertens <mbertens@xs4all.nl>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5458 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

1 files changed, 94 insertions, 0 deletions

diff --git a/src/mainboard/nokia/ip530/devicetree.cb b/src/mainboard/nokia/ip530/devicetree.cb
new file mode 100644
index 0000000000..4d37bd8ac9
--- /dev/null
+++ b/src/mainboard/nokia/ip530/devicetree.cb
@@ -0,0 +1,94 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2010 Marc Bertens <mbertens@xs4all.nl>
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; either version 2 of the License, or
+## (at your option) any later version.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+##
+
+chip northbridge/intel/i440bx		# Northbridge
+  device apic_cluster 0 on		# APIC cluster
+    chip cpu/intel/socket_PGA370	# CPU
+      device apic 0 on end		# APIC
+    end
+  end
+  device pci_domain 0 on		# PCI domain
+    device pci 0.0 on end		# Host bridge
+    device pci 1.0 on end		# PCI/AGP bridge
+    chip southbridge/intel/i82371eb	# Southbridge
+      device pci 7.0 on			# ISA bridge
+        chip superio/smsc/smscsuperio	# Super I/O (SMSC FDC37C878)
+          device pnp 3f0.0 on		# Floppy
+            io 0x60 = 0x3f0
+            irq 0x70 = 6
+            drq 0x74 = 2
+          end
+          device pnp 3f0.3 on		# Parallel port
+            io 0x60 = 0x378
+            irq 0x70 = 7
+            drq 0x74 = 4
+          end
+          device pnp 3f0.4 on		# COM1
+            io 0x60 = 0x3f8
+            irq 0x70 = 4
+          end
+          device pnp 3f0.5 on		# COM2 / IR
+            io 0x60 = 0x2f8
+            irq 0x70 = 3
+          end
+          device pnp 3f0.7 on		# PS/2 keyboard / mouse
+            io 0x60 = 0x60
+            io 0x62 = 0x64
+            irq 0x70 = 1		# PS/2 keyboard interrupt
+            irq 0x72 = 12		# PS/2 mouse interrupt
+          end
+          device pnp 3f0.9 on		# Game port
+            io 0x60 = 0x201
+          end
+          device pnp 3f0.a on		# Power-management events (PME)
+            io 0x60 = 0x600
+          end
+          device pnp 3f0.b on		# MIDI port (MPU-401)
+            io 0x60 = 0x330
+            irq 0x70 = 5
+          end
+        end
+      end
+      device pci 7.1 on end		# IDE
+      device pci 7.2 on end		# USB
+      device pci 7.3 on end		# ACPI
+      register "ide0_enable" = "1"
+      register "ide1_enable" = "1"
+      register "ide_legacy_enable" = "1"
+      # Enable UDMA/33 for higher speed if your IDE device(s) support it.
+      register "ide0_drive0_udma33_enable" = "0"
+      register "ide0_drive1_udma33_enable" = "0"
+      register "ide1_drive0_udma33_enable" = "0"
+      register "ide1_drive1_udma33_enable" = "0"
+    end
+    device pci 0d.0 on end		# NIC (DEC DECchip 21142/43)
+    device pci 0e.0 on end		# NIC (DEC DECchip 21142/43)
+    device pci 0f.0 on end		# CardBus bridge (TI PCI1225)
+    device pci 0f.1 on end		# CardBus bridge (TI PCI1225)
+  end
+  device pci_domain 1 on		# PCI domain 1
+    device pci 00.0 on end		# PCI bridge (DEC DECchip 21150)
+  end
+  device pci_domain 2 on		# PCI domain 2
+    device pci 04.0 on end		# NIC (DECchip 21142/43)
+    device pci 04.0 on end		# NIC (DECchip 21142/43)
+  end
+end
+