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authorUwe Hermann <uwe@hermann-uwe.de>2010-12-26 14:12:38 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2010-12-26 14:12:38 +0000
commit2d1d9cebffbd48d2c3737ff8c919da76e5f12586 (patch)
treeee03ad0ffefb5b883867c5784e042fd2cd98d005 /src/mainboard/nokia
parent19d69e3bab787f51f2eb9bef48bc49468a635016 (diff)
downloadcoreboot-2d1d9cebffbd48d2c3737ff8c919da76e5f12586.tar.xz
Random fixes for TI pci1x2x / Nokia IP530 / others.
- nokia/ip530/devicetree.cb, southbridge/ti/pci1x2x/pci1x2x.c: - Fix SMSC FDC37B787 name (was a typo). - Disable PS/2 keyboard/mouse LDN, the IP530 doesn't have either. - Fix typo: s/PCI_DEVICE_ID_TI_1420/PCI_DEVICE_ID_TI_1520/. - All of these are confirmed by Marc Bertens on IRC. - Fix a few CHIP_NAME HP board names. - Random whitespace and coding-style fixes. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6212 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/nokia')
-rw-r--r--src/mainboard/nokia/ip530/devicetree.cb12
1 files changed, 6 insertions, 6 deletions
diff --git a/src/mainboard/nokia/ip530/devicetree.cb b/src/mainboard/nokia/ip530/devicetree.cb
index cc3fd37e11..673e0cb10d 100644
--- a/src/mainboard/nokia/ip530/devicetree.cb
+++ b/src/mainboard/nokia/ip530/devicetree.cb
@@ -19,9 +19,9 @@
##
chip northbridge/intel/i440bx # Northbridge
- device lapic_cluster 0 on # APIC cluster
- chip cpu/intel/socket_PGA370 # CPU
- device lapic 0 on end # APIC
+ device lapic_cluster 0 on # (L)APIC cluster
+ chip cpu/intel/socket_PGA370 # CPU socket
+ device lapic 0 on end # Local APIC of the CPU
end
end
device pci_domain 0 on # PCI domain
@@ -29,7 +29,7 @@ chip northbridge/intel/i440bx # Northbridge
device pci 1.0 on end # PCI/AGP bridge
chip southbridge/intel/i82371eb # Southbridge
device pci 7.0 on # ISA bridge
- chip superio/smsc/smscsuperio # Super I/O (SMSC FDC37C878)
+ chip superio/smsc/smscsuperio # Super I/O (SMSC FDC37B787)
device pnp 3f0.0 off end # Floppy (No connector)
device pnp 3f0.3 off end # Parallel port (No connector)
device pnp 3f0.4 on # COM1
@@ -40,10 +40,10 @@ chip northbridge/intel/i440bx # Northbridge
io 0x60 = 0x2f8
irq 0x70 = 3
end
- device pnp 3f0.7 on end # PS/2 keyboard / mouse
device pnp 3f0.6 on end # RTC
+ device pnp 3f0.7 off end # PS/2 keyboard / mouse (No connector)
device pnp 3f0.8 on end # AUX I/O
- device pnp 3f0.A off end # ACPI (No support yet)
+ device pnp 3f0.a off end # ACPI (No support yet)
end
end
device pci 7.1 on end # IDE