Route device IRQ through PCI bridge instead in mptable.

Don't enable pin0 for ioapic of io-4.

1. apic error in kernel for MB with mcp55+io55
2. some pcie-cards could have pci bridge there, so need to put entries
   for device under them in mptable.

Signed-off-by: Yinghai Lu <yinghailu@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3112 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

1 files changed, 29 insertions, 64 deletions

diff --git a/src/mainboard/nvidia/l1_2pvv/get_bus_conf.c b/src/mainboard/nvidia/l1_2pvv/get_bus_conf.c
index ec5c52e0b2..2dcf49321e 100644
--- a/src/mainboard/nvidia/l1_2pvv/get_bus_conf.c
+++ b/src/mainboard/nvidia/l1_2pvv/get_bus_conf.c
@@ -35,7 +35,7 @@
 // Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
 struct mb_sysconf_t mb_sysconf;
 
-unsigned pci1234x[] = 
+unsigned pci1234x[] =
 {        //Here you only need to set value in pci1234 for HT-IO that could be installed or not
 	 //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
         0x0000ff0,
@@ -47,7 +47,7 @@ unsigned pci1234x[] =
 //        0x0000ff0,
 //        0x0000ff0
 };
-unsigned hcdnx[] = 
+unsigned hcdnx[] =
 { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
 	0x20202020,
 	0x20202020,
@@ -98,18 +98,19 @@ void get_bus_conf(void)
         device_t dev;
         int i, j;
 
-        if(get_bus_conf_done==1) return; //do it only once
+        if (get_bus_conf_done)
+		return; //do it only once
 
         get_bus_conf_done = 1;
 
 	sysconf.mb = &mb_sysconf;
-	
+
 	m = sysconf.mb;
 	memset(m, 0, sizeof(struct mb_sysconf_t));
 
         sysconf.hc_possible_num = sizeof(pci1234x)/sizeof(pci1234x[0]);
 
-        for(i=0;i<sysconf.hc_possible_num; i++) {
+        for (i = 0; i < sysconf.hc_possible_num; i++) {
                 sysconf.pci1234[i] = pci1234x[i];
                 sysconf.hcdn[i] = hcdnx[i];
         }
@@ -121,77 +122,41 @@ void get_bus_conf(void)
 	m->sbdnb = (sysconf.hcdn[1] & 0xff); // first byte of second chain
 
 	m->bus_type[0] = 1; //pci
-	
-	m->bus_mcp55[0] = (sysconf.pci1234[0] >> 16) & 0xff;
-
-                /* MCP55 */
-                dev = dev_find_slot(m->bus_mcp55[0], PCI_DEVFN(sysconf.sbdn + 0x06,0));
-                if (dev) {
-                        m->bus_mcp55[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
-                }
-                else {
-                        printk_debug("ERROR - could not find PCI 1:%02x.0, using defaults\n", sysconf.sbdn + 0x06);
-                }
-
-		for(i=2; i<8;i++) {
-	                dev = dev_find_slot(m->bus_mcp55[0], PCI_DEVFN(sysconf.sbdn + 0x0a + i - 2 , 0));
-        	        if (dev) {
-                	        m->bus_mcp55[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
-	                }
-        	        else {
-                	        printk_debug("ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_mcp55[0], sysconf.sbdn + 0x0a + i - 2 );
-        	        }
-		}
-
-		if(m->bus_mcp55[2]) {
-			for(i=0;i<2; i++) {
-	                        dev = dev_find_slot(m->bus_mcp55[2], PCI_DEVFN(0, i));
-        	                if(dev) {
-                	                m->bus_pcix[0] = m->bus_mcp55[2];
-                        	        m->bus_pcix[i+1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
-	                        }
-			}
-		}
-		
-	for(i=0; i< sysconf.hc_possible_num; i++) {
-		if(!(sysconf.pci1234[i] & 0x1) ) continue;
-
-                unsigned busn = (sysconf.pci1234[i] >> 16) & 0xff;
-                unsigned busn_max = (sysconf.pci1234[i] >> 24) & 0xff;
-		for (j = busn; j <= busn_max; j++) 
+
+	m->bus_mcp55 = (sysconf.pci1234[0] >> 16) & 0xff;
+
+	for (i = 0; i < sysconf.hc_possible_num; i++) {
+		unsigned busn_min, busn_max;
+
+		if (!(sysconf.pci1234[i] & 0x1))
+			continue;
+
+                busn_min = (sysconf.pci1234[i] >> 16) & 0xff;
+                busn_max = (sysconf.pci1234[i] >> 24) & 0xff;
+		for (j = busn_min; j <= busn_max; j++)
 			m->bus_type[j] = 1;
-		if(m->bus_isa <= busn_max) 
+		if(m->bus_isa <= busn_max)
 			m->bus_isa = busn_max + 1;
-	        printk_debug("i=%d bus range: [%x, %x] bus_isa=%x\n",i, busn, busn_max, m->bus_isa);
+	        printk_debug("i=%d bus range: [%x, %x] bus_isa=%x\n",i, busn_min, busn_max, m->bus_isa);
 	}
 
                 /* MCP55b */
-        for(i=1; i< sysconf.hc_possible_num; i++) {
-		if (!(sysconf.pci1234[i] & 0x0f) ) continue;
+        for (i = 1; i < sysconf.hc_possible_num; i++) {
+		if (!(sysconf.pci1234[i] & 0x0f))
+			continue;
                 // check hcid type here
                 sysconf.hcid[i] = get_hcid(i);
-                if (!sysconf.hcid[i]) continue; //unknown co processor
-
-		m->bus_mcp55b[0] = (sysconf.pci1234[1]>>16) & 0xff;
-		m->bus_mcp55b[1] = m->bus_mcp55b[0]+1; //fake pci
-
-		for(i=2; i<8;i++) {
-	                dev = dev_find_slot(m->bus_mcp55b[0], PCI_DEVFN(m->sbdnb + 0x0a + i - 2 , 0));
-        	        if (dev) {
-                	        m->bus_mcp55b[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
-	                }
-        	        else {
-                	        printk_debug("ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_mcp55b[0], m->sbdnb + 0x0a + i - 2 );
-        	        }
-		}
-	}
+                if (!sysconf.hcid[i])
+			continue; //unknown co processor
 
+		m->bus_mcp55b = (sysconf.pci1234[1]>>16) & 0xff;
+	}
 
 /*I/O APICs:	APIC ID	Version	State		Address*/
 #if CONFIG_LOGICAL_CPUS==1
 	apicid_base = get_apicid_base(2);
-#else 
-	apicid_base = CONFIG_MAX_PHYSICAL_CPUS; 
+#else
+	apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
 #endif
 	m->apicid_mcp55 = apicid_base+0;
         m->apicid_mcp55b = apicid_base+1;