summaryrefslogtreecommitdiff
path: root/src/mainboard/nvidia/l1_2pvv
diff options
context:
space:
mode:
authorKyösti Mälkki <kyosti.malkki@gmail.com>2013-12-10 07:33:36 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2013-12-26 23:22:17 +0100
commit142b52cd322ff69afe974f90a446f62b193d120c (patch)
treebada24c0b138e115ebb705409dd7173f1640ac30 /src/mainboard/nvidia/l1_2pvv
parent88a67f0cc9d0bec08a6cfa5b1c3f4198fd98ab4f (diff)
downloadcoreboot-142b52cd322ff69afe974f90a446f62b193d120c.tar.xz
AMD boards (non-AGESA): Cleanup post_cache_as_ram.c includes
Change-Id: Ib3a69e3364418426438f88ba14e5cf744e2414fa Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/4524 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/mainboard/nvidia/l1_2pvv')
-rw-r--r--src/mainboard/nvidia/l1_2pvv/romstage.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mainboard/nvidia/l1_2pvv/romstage.c b/src/mainboard/nvidia/l1_2pvv/romstage.c
index 30abcce935..305ab661d9 100644
--- a/src/mainboard/nvidia/l1_2pvv/romstage.c
+++ b/src/mainboard/nvidia/l1_2pvv/romstage.c
@@ -75,7 +75,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "southbridge/nvidia/mcp55/early_setup_ss.h"
#include "southbridge/nvidia/mcp55/early_setup_car.c"
-#include "cpu/amd/car/post_cache_as_ram.c"
#include "cpu/amd/model_fxx/init_cpus.c"
#include "cpu/amd/model_fxx/fidvid.c"
#include "northbridge/amd/amdk8/early_ht.c"