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author | Myles Watson <mylesgw@gmail.com> | 2009-10-15 13:35:47 +0000 |
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committer | Myles Watson <mylesgw@gmail.com> | 2009-10-15 13:35:47 +0000 |
commit | b8e2027be817159d4606f991475b59fc36b0242d (patch) | |
tree | 1ab06caebfc37dbff884d916c43cca6b9562ae85 /src/mainboard/nvidia/l1_2pvv | |
parent | 45b811b13552a94af4713b77613d377561e4ef26 (diff) | |
download | coreboot-b8e2027be817159d4606f991475b59fc36b0242d.tar.xz |
Add CONFIG_GENERATE_* for tables so that the user can select which tables not
to build, but by default all the tables that are available are built.
Make PIRQ table build for qemu.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4778 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/nvidia/l1_2pvv')
-rw-r--r-- | src/mainboard/nvidia/l1_2pvv/Config.lb | 6 | ||||
-rw-r--r-- | src/mainboard/nvidia/l1_2pvv/Kconfig | 4 | ||||
-rw-r--r-- | src/mainboard/nvidia/l1_2pvv/Makefile.inc | 4 | ||||
-rw-r--r-- | src/mainboard/nvidia/l1_2pvv/Options.lb | 12 |
4 files changed, 13 insertions, 13 deletions
diff --git a/src/mainboard/nvidia/l1_2pvv/Config.lb b/src/mainboard/nvidia/l1_2pvv/Config.lb index 978e88f795..eab69e6114 100644 --- a/src/mainboard/nvidia/l1_2pvv/Config.lb +++ b/src/mainboard/nvidia/l1_2pvv/Config.lb @@ -33,11 +33,11 @@ driver mainboard.o #needed by irq_tables and mptable and acpi_tables object get_bus_conf.o -if CONFIG_HAVE_MP_TABLE object mptable.o end -if CONFIG_HAVE_PIRQ_TABLE object irq_tables.o end +if CONFIG_GENERATE_MP_TABLE object mptable.o end +if CONFIG_GENERATE_PIRQ_TABLE object irq_tables.o end #object reset.o -if CONFIG_HAVE_ACPI_TABLES +if CONFIG_GENERATE_ACPI_TABLES object acpi_tables.o object fadt.o makerule dsdt.c diff --git a/src/mainboard/nvidia/l1_2pvv/Kconfig b/src/mainboard/nvidia/l1_2pvv/Kconfig index a153993f09..4e9dc600c1 100644 --- a/src/mainboard/nvidia/l1_2pvv/Kconfig +++ b/src/mainboard/nvidia/l1_2pvv/Kconfig @@ -7,11 +7,11 @@ config BOARD_NVIDIA_L1_2PVV select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX select SOUTHBRIDGE_NVIDIA_MCP55 select SUPERIO_WINBOND_W83627EHG - select PIRQ_TABLE + select HAVE_PIRQ_TABLE + select HAVE_MP_TABLE select USE_PRINTK_IN_CAR select USE_DCACHE_RAM select HAVE_HARD_RESET - select HAVE_HIGH_TABLES select IOAPIC select MEM_TRAIN_SEQ select SB_HT_CHAIN_UNITID_OFFSET_ONLY diff --git a/src/mainboard/nvidia/l1_2pvv/Makefile.inc b/src/mainboard/nvidia/l1_2pvv/Makefile.inc index 56cbf31bf0..66cc3e6cb0 100644 --- a/src/mainboard/nvidia/l1_2pvv/Makefile.inc +++ b/src/mainboard/nvidia/l1_2pvv/Makefile.inc @@ -23,8 +23,8 @@ driver-y += mainboard.o #needed by irq_tables and mptable and acpi_tables obj-y += get_bus_conf.o -obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o -obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o +obj-$(CONFIG_GENERATE_MP_TABLE) += mptable.o +obj-$(CONFIG_GENERATE_PIRQ_TABLE) += irq_tables.o obj-$(CONFIG_USE_INIT) += cache_as_ram_auto.o obj-$(CONFIG_AP_CODE_IN_CAR) += apc_auto.o diff --git a/src/mainboard/nvidia/l1_2pvv/Options.lb b/src/mainboard/nvidia/l1_2pvv/Options.lb index 3b86621304..a3d8f8e3ee 100644 --- a/src/mainboard/nvidia/l1_2pvv/Options.lb +++ b/src/mainboard/nvidia/l1_2pvv/Options.lb @@ -19,9 +19,9 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## -uses CONFIG_HAVE_MP_TABLE -uses CONFIG_HAVE_PIRQ_TABLE -uses CONFIG_HAVE_ACPI_TABLES +uses CONFIG_GENERATE_MP_TABLE +uses CONFIG_GENERATE_PIRQ_TABLE +uses CONFIG_GENERATE_ACPI_TABLES uses CONFIG_HAVE_ACPI_RESUME uses CONFIG_ACPI_SSDTX_NUM uses CONFIG_USE_FALLBACK_IMAGE @@ -149,17 +149,17 @@ default CONFIG_HAVE_HARD_RESET=1 ## ## Build code to export a programmable irq routing table ## -default CONFIG_HAVE_PIRQ_TABLE=1 +default CONFIG_GENERATE_PIRQ_TABLE=1 default CONFIG_IRQ_SLOT_COUNT=11 ## ## Build code to export an x86 MP table ## Useful for specifying IRQ routing values ## -default CONFIG_HAVE_MP_TABLE=1 +default CONFIG_GENERATE_MP_TABLE=1 ## ACPI tables will be included -default CONFIG_HAVE_ACPI_TABLES=0 +default CONFIG_GENERATE_ACPI_TABLES=0 ## ## Build code to export a CMOS option table |