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| author | Stefan Reinauer <stepan@coresystems.de> | 2010-04-25 18:06:32 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2010-04-25 18:06:32 +0000 |
| commit | bcb8c97af94c9fc814fdbdafe5361666bf81d442 (patch) | |
| tree | d3a121678b32d7436787975292432c4975bb9f6d /src/mainboard/nvidia/l1_2pvv | |
| parent | 14b62da01ded297e12db6ed3b41778202e9aae41 (diff) | |
| download | coreboot-bcb8c97af94c9fc814fdbdafe5361666bf81d442.tar.xz | |
try to unify timing initialization across those boards that need it...
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5496 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/nvidia/l1_2pvv')
| -rw-r--r-- | src/mainboard/nvidia/l1_2pvv/romstage.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/mainboard/nvidia/l1_2pvv/romstage.c b/src/mainboard/nvidia/l1_2pvv/romstage.c index 58bf5c2958..62be8c2fd5 100644 --- a/src/mainboard/nvidia/l1_2pvv/romstage.c +++ b/src/mainboard/nvidia/l1_2pvv/romstage.c @@ -250,6 +250,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) } #endif + init_timer(); /* Need to use TMICT to synconize FID/VID. */ needs_reset |= optimize_link_coherent_ht(); needs_reset |= optimize_link_incoherent_ht(sysinfo); @@ -267,9 +268,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) enable_smbus(); - //do we need apci timer, tsc...., only debug need it for better output /* all ap stopped? */ -// init_timer(); // Need to use TMICT to synconize FID/VID sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo); |