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authorEdwin Beasant <edwin_beasant@virtensys.com>2010-07-06 21:05:04 +0000
committerMyles Watson <mylesgw@gmail.com>2010-07-06 21:05:04 +0000
commiteb50c7d922e91f0247b3705eccb2d2eec638c277 (patch)
tree2def570d089b2f6deb2beac165e18756a578e308 /src/mainboard/nvidia/l1_2pvv
parent8376831eafc1be1175529fd21e0d2fe40339d4eb (diff)
downloadcoreboot-eb50c7d922e91f0247b3705eccb2d2eec638c277.tar.xz
Re-integrate "USE_OPTION_TABLE" code.
Signed-off-by: Edwin Beasant <edwin_beasant@virtensys.com> Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5653 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/nvidia/l1_2pvv')
-rw-r--r--src/mainboard/nvidia/l1_2pvv/Kconfig1
-rw-r--r--src/mainboard/nvidia/l1_2pvv/ap_romstage.c3
-rw-r--r--src/mainboard/nvidia/l1_2pvv/romstage.c3
3 files changed, 3 insertions, 4 deletions
diff --git a/src/mainboard/nvidia/l1_2pvv/Kconfig b/src/mainboard/nvidia/l1_2pvv/Kconfig
index ab361f175f..5794521b3a 100644
--- a/src/mainboard/nvidia/l1_2pvv/Kconfig
+++ b/src/mainboard/nvidia/l1_2pvv/Kconfig
@@ -6,6 +6,7 @@ config BOARD_NVIDIA_L1_2PVV
select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
select SOUTHBRIDGE_NVIDIA_MCP55
select SUPERIO_WINBOND_W83627EHG
+ select HAVE_OPTION_TABLE
select HAVE_BUS_CONFIG
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
diff --git a/src/mainboard/nvidia/l1_2pvv/ap_romstage.c b/src/mainboard/nvidia/l1_2pvv/ap_romstage.c
index 2e7b5aa970..8d3cb8d9c7 100644
--- a/src/mainboard/nvidia/l1_2pvv/ap_romstage.c
+++ b/src/mainboard/nvidia/l1_2pvv/ap_romstage.c
@@ -39,8 +39,7 @@
#include <device/pnp_def.h>
#include <arch/romcc_io.h>
#include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
#include "pc80/serial.c"
#include "lib/uart8250.c"
diff --git a/src/mainboard/nvidia/l1_2pvv/romstage.c b/src/mainboard/nvidia/l1_2pvv/romstage.c
index 001173657a..dfdc57c742 100644
--- a/src/mainboard/nvidia/l1_2pvv/romstage.c
+++ b/src/mainboard/nvidia/l1_2pvv/romstage.c
@@ -48,8 +48,7 @@
#include <device/pnp_def.h>
#include <arch/romcc_io.h>
#include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
#include <console/console.h>
#if CONFIG_USBDEBUG