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authorStefan Reinauer <stepan@coresystems.de>2010-04-14 18:59:42 +0000
committerStefan Reinauer <stepan@openbios.org>2010-04-14 18:59:42 +0000
commit523ebd927d80807fa8a8c30cddfe0f549b7f62d8 (patch)
treed26cc7520f89d16260fa1cd989512834bb7dc962 /src/mainboard/nvidia
parent97b21be8c74a2e9da5a7c01944a727e0bab05170 (diff)
downloadcoreboot-523ebd927d80807fa8a8c30cddfe0f549b7f62d8.tar.xz
zero warning days. Move RAMTOP and RAMBASE together.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5435 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/nvidia')
-rw-r--r--src/mainboard/nvidia/l1_2pvv/romstage.c10
1 files changed, 4 insertions, 6 deletions
diff --git a/src/mainboard/nvidia/l1_2pvv/romstage.c b/src/mainboard/nvidia/l1_2pvv/romstage.c
index 767547c64e..78afa3999d 100644
--- a/src/mainboard/nvidia/l1_2pvv/romstage.c
+++ b/src/mainboard/nvidia/l1_2pvv/romstage.c
@@ -145,8 +145,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
static void sio_setup(void)
{
-
- unsigned value;
uint32_t dword;
uint8_t byte;
@@ -161,21 +159,21 @@ static void sio_setup(void)
dword = pci_read_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa4);
dword |= (1<<16);
pci_write_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa4, dword);
-
}
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
static const uint16_t spd_addr [] = {
+ // Node 0
(0xa<<3)|0, (0xa<<3)|2, 0, 0,
(0xa<<3)|1, (0xa<<3)|3, 0, 0,
-#if CONFIG_MAX_PHYSICAL_CPUS > 1
+ // Node 1
(0xa<<3)|4, (0xa<<3)|6, 0, 0,
(0xa<<3)|5, (0xa<<3)|7, 0, 0,
-#endif
};
- struct sys_info *sysinfo = (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
+ struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE
+ + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
int needs_reset = 0;
unsigned bsp_apicid = 0;