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authorMyles Watson <mylesgw@gmail.com>2010-09-10 18:33:24 +0000
committerMyles Watson <mylesgw@gmail.com>2010-09-10 18:33:24 +0000
commit6ea2115ceae9d426f293b029f305e61a01346640 (patch)
tree13ac5430e7442060dc6e97956a015fe04ab1d1d0 /src/mainboard/nvidia
parent17daf9a941e1c5653a84ba651b21815404f2b4b5 (diff)
downloadcoreboot-6ea2115ceae9d426f293b029f305e61a01346640.tar.xz
Move memory type information out of some AMD sockets.
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5800 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/nvidia')
-rw-r--r--src/mainboard/nvidia/l1_2pvv/Kconfig2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/nvidia/l1_2pvv/Kconfig b/src/mainboard/nvidia/l1_2pvv/Kconfig
index d948c228ae..502da61dac 100644
--- a/src/mainboard/nvidia/l1_2pvv/Kconfig
+++ b/src/mainboard/nvidia/l1_2pvv/Kconfig
@@ -4,6 +4,8 @@ config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select ARCH_X86
select CPU_AMD_SOCKET_F
+ select DIMM_DDR2
+ select DIMM_REGISTERED
select NORTHBRIDGE_AMD_AMDK8
select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
select SOUTHBRIDGE_NVIDIA_MCP55