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author | Johnny Lin <johnny_lin@wiwynn.com> | 2020-07-20 17:35:31 +0800 |
---|---|---|
committer | Angel Pons <th3fanbus@gmail.com> | 2020-07-22 12:19:53 +0000 |
commit | 2b3a500fed1cbe5b04421ac881c2f806e14f5964 (patch) | |
tree | 62fbcc565f9442a35b94227b87a41e557f8b878e /src/mainboard/ocp/deltalake | |
parent | 973b2aaa2424757649c32df7084c9eb9d070e539 (diff) | |
download | coreboot-2b3a500fed1cbe5b04421ac881c2f806e14f5964.tar.xz |
mb/ocp/deltalake: Set FSP log level and add default values if VPD variables are not found
1. Read VPD variable 'fsp_log_level' to decide FSP log level.
2. Define the default values when the VPD variables cannot be found,
put all the values to vpd.h for better documentation and maintenance.
Tested=On OCP DeltaLake, the fsp_log_level can be changed from the VPD variable.
Change-Id: I44cd59ed0c942c31aaf95ed0c8ac78eb7d661123
Signed-off-by: Johnny Lin <johnny_lin@wiwynn.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43606
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard/ocp/deltalake')
-rw-r--r-- | src/mainboard/ocp/deltalake/ipmi.c | 22 | ||||
-rw-r--r-- | src/mainboard/ocp/deltalake/romstage.c | 25 | ||||
-rw-r--r-- | src/mainboard/ocp/deltalake/vpd.h | 19 |
3 files changed, 49 insertions, 17 deletions
diff --git a/src/mainboard/ocp/deltalake/ipmi.c b/src/mainboard/ocp/deltalake/ipmi.c index 19a85d567c..acff3dba4a 100644 --- a/src/mainboard/ocp/deltalake/ipmi.c +++ b/src/mainboard/ocp/deltalake/ipmi.c @@ -77,19 +77,18 @@ enum cb_err ipmi_get_slot_id(uint8_t *slot_id) void init_frb2_wdt(void) { - char val[VPD_LEN]; - /* Enable FRB2 timer by default. */ - u8 enable = 1; + u8 enable; uint16_t countdown; if (vpd_get_bool(FRB2_TIMER, VPD_RW_THEN_RO, &enable)) { - if (!enable) { - printk(BIOS_DEBUG, "Disable FRB2 timer\n"); - ipmi_stop_bmc_wdt(CONFIG_BMC_KCS_BASE); - return; - } + printk(BIOS_DEBUG, "Got VPD %s value: %d\n", FRB2_TIMER, enable); + } else { + printk(BIOS_INFO, "Not able to get VPD %s, default set to %d\n", FRB2_TIMER, + FRB2_TIMER_DEFAULT); + enable = FRB2_TIMER_DEFAULT; } + if (enable) { if (vpd_gets(FRB2_COUNTDOWN, val, VPD_LEN, VPD_RW_THEN_RO)) { countdown = (uint16_t)atol(val); @@ -97,10 +96,13 @@ void init_frb2_wdt(void) countdown * 100); } else { printk(BIOS_DEBUG, "FRB2 timer use default value: %d ms\n", - DEFAULT_COUNTDOWN * 100); - countdown = DEFAULT_COUNTDOWN; + FRB2_COUNTDOWN_DEFAULT * 100); + countdown = FRB2_COUNTDOWN_DEFAULT; } ipmi_init_and_start_bmc_wdt(CONFIG_BMC_KCS_BASE, countdown, TIMEOUT_HARD_RESET); + } else { + printk(BIOS_DEBUG, "Disable FRB2 timer\n"); + ipmi_stop_bmc_wdt(CONFIG_BMC_KCS_BASE); } } diff --git a/src/mainboard/ocp/deltalake/romstage.c b/src/mainboard/ocp/deltalake/romstage.c index 2c8dc5efa2..52679df25c 100644 --- a/src/mainboard/ocp/deltalake/romstage.c +++ b/src/mainboard/ocp/deltalake/romstage.c @@ -6,6 +6,7 @@ #include <fsp/api.h> #include <FspmUpd.h> #include <soc/romstage.h> +#include <string.h> #include "chip.h" #include "ipmi.h" @@ -18,16 +19,36 @@ static void mainboard_config_upd(FSPM_UPD *mupd) { uint8_t val; + char val_str[VPD_LEN]; /* Send FSP log message to SOL */ if (vpd_get_bool(FSP_LOG, VPD_RW_THEN_RO, &val)) mupd->FspmConfig.SerialIoUartDebugEnable = val; else { printk(BIOS_INFO, "Not able to get VPD %s, default set " - "SerialIoUartDebugEnable to 1\n", FSP_LOG); - mupd->FspmConfig.SerialIoUartDebugEnable = 1; + "SerialIoUartDebugEnable to %d\n", FSP_LOG, FSP_LOG_DEFAULT); + mupd->FspmConfig.SerialIoUartDebugEnable = FSP_LOG_DEFAULT; } mupd->FspmConfig.SerialIoUartDebugIoBase = 0x2f8; + + if (mupd->FspmConfig.SerialIoUartDebugEnable) { + /* FSP debug log level */ + if (vpd_gets(FSP_LOG_LEVEL, val_str, VPD_LEN, VPD_RW_THEN_RO)) { + val = (uint8_t)atol(val_str); + if (val > 0x0f) { + printk(BIOS_DEBUG, "Invalid DebugPrintLevel value from VPD: " + "%d\n", val); + val = FSP_LOG_LEVEL_DEFAULT; + } + printk(BIOS_DEBUG, "Setting DebugPrintLevel %d from VPD\n", val); + mupd->FspmConfig.DebugPrintLevel = val; + } else { + printk(BIOS_INFO, "Not able to get VPD %s, default set " + "DebugPrintLevel to %d\n", FSP_LOG_LEVEL, + FSP_LOG_LEVEL_DEFAULT); + mupd->FspmConfig.DebugPrintLevel = FSP_LOG_LEVEL_DEFAULT; + } + } } /* Update bifurcation settings according to different Configs */ diff --git a/src/mainboard/ocp/deltalake/vpd.h b/src/mainboard/ocp/deltalake/vpd.h index 9e17bb9b80..5466ef7fee 100644 --- a/src/mainboard/ocp/deltalake/vpd.h +++ b/src/mainboard/ocp/deltalake/vpd.h @@ -3,15 +3,24 @@ #ifndef DELTALAKE_VPD_H #define DELTALAKE_VPD_H -/* VPD variable for enabling/disabling FRB2 timer. */ -#define FRB2_TIMER "frb2_timer" +/* VPD variable maximum length */ +#define VPD_LEN 10 + +/* VPD variable for enabling/disabling FRB2 timer. 1/0: Enable/disable */ +#define FRB2_TIMER "frb2_timer_enable" +#define FRB2_TIMER_DEFAULT 1 /* Default value when the VPD variable is not found */ + /* VPD variable for setting FRB2 timer countdown value. */ #define FRB2_COUNTDOWN "frb2_countdown" -#define VPD_LEN 10 -/* Default countdown is 15 minutes. */ -#define DEFAULT_COUNTDOWN 9000 +/* Default countdown is 15 minutes when the VPD variable is not found */ +#define FRB2_COUNTDOWN_DEFAULT 9000 /* Define the VPD keys for UPD variables that can be overwritten */ #define FSP_LOG "fsp_log_enable" /* 1 or 0: enable or disable FSP SOL log */ +#define FSP_LOG_DEFAULT 1 /* Default value when the VPD variable is not found */ + +/* FSP debug print level: 1:Fatal, 2:Warning, 4:Summary, 8:Detail, 0x0F:All */ +#define FSP_LOG_LEVEL "fsp_log_level" +#define FSP_LOG_LEVEL_DEFAULT 8 /* Default value when the VPD variable is not found */ #endif |