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| author | Andrey Petrov <anpetrov@fb.com> | 2020-03-22 22:16:03 -0700 |
|---|---|---|
| committer | Andrey Petrov <anpetrov@fb.com> | 2020-03-26 18:13:35 +0000 |
| commit | b75bcc978af50dc409b5356abd33b064029480bb (patch) | |
| tree | e10fb054547ee8375410cccd005b344495ccc54c /src/mainboard/ocp/tiogapass/Kconfig | |
| parent | 5e5d9c2d1be190b00fec9e981cbe8bd89a62bb50 (diff) | |
| download | coreboot-b75bcc978af50dc409b5356abd33b064029480bb.tar.xz | |
mb/ocp/tiogapass: Properly configure early serial output
Tioga Pass comes with AST2500 BMC which offers SuperIO functionality.
However we currently do not configure/enable SuperIO chip. As a result
system boots pretty silently on cold boot. Then FSP configures SuperIO
and resets the system so on next boot serial console does work. This
makes debugging difficult because pre-FSP output is invisible.
This patch enables bootblock to properly configure desired BMC SuperIO
port so early serial output is visible.
TEST=do a cold boot on OCP Tioga Pass, observe bootblock output starting
from bootblock.
Change-Id: Iff8e6a862858d733f529bb9b8c65e22e5ec6b521
Signed-off-by: Andrey Petrov <anpetrov@fb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39782
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Diffstat (limited to 'src/mainboard/ocp/tiogapass/Kconfig')
| -rw-r--r-- | src/mainboard/ocp/tiogapass/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/ocp/tiogapass/Kconfig b/src/mainboard/ocp/tiogapass/Kconfig index 1d501e6db0..f9b5e7f48a 100644 --- a/src/mainboard/ocp/tiogapass/Kconfig +++ b/src/mainboard/ocp/tiogapass/Kconfig @@ -22,6 +22,7 @@ config BOARD_SPECIFIC_OPTIONS select MAINBOARD_USES_FSP2_0 select IPMI_KCS select SOC_INTEL_SKYLAKE_SP + select SUPERIO_ASPEED_AST2400 config MAINBOARD_DIR string |