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author | Maxim Polyakov <max.senia.poliak@gmail.com> | 2020-04-26 20:56:50 +0300 |
---|---|---|
committer | Andrey Petrov <andrey.petrov@gmail.com> | 2020-05-01 21:39:21 +0000 |
commit | 89d2aa0cdc43a85258ff6b6ca2c781339081025a (patch) | |
tree | 1e46483de66fd37ae184825e0b79325efaf23153 /src/mainboard/ocp/tiogapass/romstage.c | |
parent | ed7d91d2579ea9a8eb6b62972ad7beeb2f136d8a (diff) | |
download | coreboot-89d2aa0cdc43a85258ff6b6ca2c781339081025a.tar.xz |
mb/tiogapass: use common driver to configure GPIO
According to changes in the soc/xeon_sp code [1,2], server motherboards
with Lewisburg PCH can use the soc/intel/common/gpio driver to configure
GPIO controller. This patch adds pads configuration map, which has the
format required by the GPIO driver. The data for this was taken from the
inteltool register dump with AMI firmware. The gpio.h file with pad
configuration was generated automatically using the util/intelp2m [3]:
./intelp2m -raw -p lbg -file tiogapass/vendorbios/inteltool_gpio.log
[1] https: //review.coreboot.org/c/coreboot/+/39425
[2] https: //review.coreboot.org/c/coreboot/+/39428
[3] https: //review.coreboot.org/c/coreboot/+/35643
Change-Id: I818d040fa33f3e7b94b73c9bbbafca5df424616d
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39427
Reviewed-by: Andrey Petrov <andrey.petrov@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/ocp/tiogapass/romstage.c')
-rw-r--r-- | src/mainboard/ocp/tiogapass/romstage.c | 16 |
1 files changed, 4 insertions, 12 deletions
diff --git a/src/mainboard/ocp/tiogapass/romstage.c b/src/mainboard/ocp/tiogapass/romstage.c index e4a188d35d..41f785638a 100644 --- a/src/mainboard/ocp/tiogapass/romstage.c +++ b/src/mainboard/ocp/tiogapass/romstage.c @@ -20,7 +20,6 @@ #include <gpio.h> #include <soc/lewisburg_pch_gpio_defs.h> -#include "skxsp_tp_gpio.h" #include "skxsp_tp_iio.h" static uint8_t iio_table_buf[sizeof(tp_iio_bifur_table)]; @@ -39,16 +38,6 @@ static void oem_update_iio(FSPM_UPD *mupd) = IIO_BIFURCATE_xxx8xxx8; } -/* -* Configure GPIO depend on platform -*/ -static void mainboard_config_gpios(FSPM_UPD *mupd) -{ - mupd->FspmConfig.GpioConfig.GpioTable = (UPD_GPIO_INIT_CONFIG *) tp_gpio_table; - mupd->FspmConfig.GpioConfig.NumberOfEntries = - sizeof(tp_gpio_table)/sizeof(UPD_GPIO_INIT_CONFIG); -} - static void mainboard_config_iio(FSPM_UPD *mupd) { memcpy(iio_table_buf, tp_iio_bifur_table, sizeof(tp_iio_bifur_table)); @@ -74,6 +63,9 @@ static void mainboard_config_iio(FSPM_UPD *mupd) void mainboard_memory_init_params(FSPM_UPD *mupd) { - mainboard_config_gpios(mupd); mainboard_config_iio(mupd); + + /* do not configure GPIO controller inside FSP-M */ + mupd->FspmConfig.GpioConfig.GpioTable = NULL; + mupd->FspmConfig.GpioConfig.NumberOfEntries = 0; } |