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authorMichael Niewöhner <foss@mniewoehner.de>2020-12-16 19:52:32 +0100
committerMichael Niewöhner <foss@mniewoehner.de>2021-04-06 06:56:01 +0000
commit61469c7a35281b886692db6fc7e1b7114aca4807 (patch)
tree9c4bb591b3dfa97c672811d122dd6baa792b67aa /src/mainboard/ocp
parent71491a617661a04dc958f1bb1fe700c5b778129a (diff)
downloadcoreboot-61469c7a35281b886692db6fc7e1b7114aca4807.tar.xz
mb/ocp/tiogapass: correct "POST complete" pad initial value
On OCP Tioga Pass the pad GPP_B20 is used as output for signalling "POST complete" to the BMC. According to the schematics and the code in `ramstage.c`, the signal is active-low. There is an external pull-up resistor. To make the signalling work as it should, set the initial output value to `high`. Change-Id: I82fbda1caba9163ba3b2e38f494a0cefa27e657f Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48670 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/ocp')
-rw-r--r--src/mainboard/ocp/tiogapass/include/tp_pch_gpio.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/ocp/tiogapass/include/tp_pch_gpio.h b/src/mainboard/ocp/tiogapass/include/tp_pch_gpio.h
index 97ab7cb39e..59ab3e7fdc 100644
--- a/src/mainboard/ocp/tiogapass/include/tp_pch_gpio.h
+++ b/src/mainboard/ocp/tiogapass/include/tp_pch_gpio.h
@@ -99,7 +99,7 @@ static const struct pad_config gpio_table[] = {
/* GPP_B19 - GPIO */
PAD_CFG_GPO(GPP_B19, 1, DEEP),
/* GPP_B20 - GPIO */
- PAD_CFG_GPO(GPP_B20, 0, DEEP),
+ PAD_CFG_GPO(GPP_B20, 1, DEEP),
/* GPP_B21 - GPIO */
PAD_CFG_GPI_TRIG_OWN(GPP_B21, NONE, DEEP, OFF, DRIVER),
/* GPP_B22 - GPIO */