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authorRonald G. Minnich <rminnich@gmail.com>2006-05-16 02:51:16 +0000
committerRonald G. Minnich <rminnich@gmail.com>2006-05-16 02:51:16 +0000
commit5d573c28e7520085ff7b687c05834292d615860a (patch)
treec57d0b36b4b1bd793a847c94352b6efee88c261e /src/mainboard/olpc/rev_a
parent98e904ea7cfe9ef1ffeda4d3eaac2d42a5345760 (diff)
downloadcoreboot-5d573c28e7520085ff7b687c05834292d615860a.tar.xz
Commit for IDE NAND FLASH
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2306 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/olpc/rev_a')
-rw-r--r--src/mainboard/olpc/rev_a/Config.lb1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/olpc/rev_a/Config.lb b/src/mainboard/olpc/rev_a/Config.lb
index 8c5d98388a..86b1c0e482 100644
--- a/src/mainboard/olpc/rev_a/Config.lb
+++ b/src/mainboard/olpc/rev_a/Config.lb
@@ -134,6 +134,7 @@ chip northbridge/amd/gx2
device pci 1.1 on end
chip southbridge/amd/cs5536
register "enable_gpio0_inta" = "1"
+ register "enable_ide_nand_flash" = "1"
device pci d.0 on end # Realtek 8139 LAN
device pci f.0 on end # ISA Bridge
device pci f.2 on end # IDE Controller