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authorEdwin Beasant <edwin_beasant@virtensys.com>2010-02-09 10:22:33 +0000
committerPatrick Georgi <patrick.georgi@coresystems.de>2010-02-09 10:22:33 +0000
commite30db0e37034f6698eced00727b6ad0ba3fc5c7b (patch)
tree8bfb03dcb7f3b161772f1099bd62240463684d4d /src/mainboard/olpc
parent37d8c215a27f3c7938e921ccb849a9b8fa01be77 (diff)
downloadcoreboot-e30db0e37034f6698eced00727b6ad0ba3fc5c7b.tar.xz
Port of CS5536 early UART setup from v3.
Permit early setup of COM2 Signed-off-by: Edwin Beasant <edwin_beasant@virtensys.com> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5097 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/olpc')
-rw-r--r--src/mainboard/olpc/btest/romstage.c2
-rw-r--r--src/mainboard/olpc/rev_a/romstage.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/olpc/btest/romstage.c b/src/mainboard/olpc/btest/romstage.c
index 21363b7199..fa75b20c1d 100644
--- a/src/mainboard/olpc/btest/romstage.c
+++ b/src/mainboard/olpc/btest/romstage.c
@@ -177,7 +177,7 @@ static void main(unsigned long bist)
* it is counting on some early MSR setup
* for cs5536
*/
- cs5536_setup_onchipuart();
+ cs5536_setup_onchipuart(1);
gpio_init();
uart_init();
console_init();
diff --git a/src/mainboard/olpc/rev_a/romstage.c b/src/mainboard/olpc/rev_a/romstage.c
index 21363b7199..fa75b20c1d 100644
--- a/src/mainboard/olpc/rev_a/romstage.c
+++ b/src/mainboard/olpc/rev_a/romstage.c
@@ -177,7 +177,7 @@ static void main(unsigned long bist)
* it is counting on some early MSR setup
* for cs5536
*/
- cs5536_setup_onchipuart();
+ cs5536_setup_onchipuart(1);
gpio_init();
uart_init();
console_init();