summaryrefslogtreecommitdiff
path: root/src/mainboard/packardbell
diff options
context:
space:
mode:
authorKyösti Mälkki <kyosti.malkki@gmail.com>2016-06-17 10:00:28 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2016-06-22 10:49:18 +0200
commit8431fcb8c8e248d777723e0a6651b9030d29cf8e (patch)
treec9b06b7c67c8f6fa54d5ae03c59887ada4f0c690 /src/mainboard/packardbell
parentb4f827d45a08d849df9d15abd644e3a98a6f1932 (diff)
downloadcoreboot-8431fcb8c8e248d777723e0a6651b9030d29cf8e.tar.xz
intel/model_2065x: Prepare for dynamic CONFIG_RAMTOP
Change-Id: I616143b55d7c5726dc2475434e3fcb08b8d69bda Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/15230 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/packardbell')
-rw-r--r--src/mainboard/packardbell/ms2290/romstage.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/src/mainboard/packardbell/ms2290/romstage.c b/src/mainboard/packardbell/ms2290/romstage.c
index e8f625d97a..d46a768f4b 100644
--- a/src/mainboard/packardbell/ms2290/romstage.c
+++ b/src/mainboard/packardbell/ms2290/romstage.c
@@ -28,12 +28,12 @@
#include <pc80/mc146818rtc.h>
#include <console/console.h>
#include <cpu/x86/bist.h>
+#include <cpu/intel/romstage.h>
#include <ec/acpi/ec.h>
#include <delay.h>
#include <timestamp.h>
#include <arch/acpi.h>
#include <cbmem.h>
-#include <cpu/intel/romstage.h>
#include "arch/early_variables.h"
#include <southbridge/intel/ibexpeak/pch.h>
@@ -166,8 +166,7 @@ static inline u16 read_acpi16(u32 addr)
}
#endif
-#include <cpu/intel/romstage.h>
-void main(unsigned long bist)
+void mainboard_romstage_entry(unsigned long bist)
{
u32 reg32;
int s3resume = 0;