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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-11-14 16:20:22 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2015-02-23 21:34:21 +0100 |
| commit | 8c190f3518d504d904692e93e7881c379b89f542 (patch) | |
| tree | 007e007823bc87be9416573c389cf05259a5e212 /src/mainboard/pcengines/apu1/BiosCallOuts.c | |
| parent | f09e6d47b8174017d8964780b916dec9dd0b2009 (diff) | |
| download | coreboot-8c190f3518d504d904692e93e7881c379b89f542.tar.xz | |
pcengines/apu1: New board PC Engines APU1
While we cannot recreate exact copies of PC Engines APU1 firmware images,
I shall upstream the vital changes for coreboot from the following tarballs
SAGE has published to meet GPL:
SageBios_PCEngines_APU_sources_for_publishing_20140405_GPL_package.tar.gz
md5sum: ce5f54723e4fe3b63a1a3e35586728d4
pcengines.apu_139_osp.tar.gz
md5sum: af6c8ab3b85d1a5a9fbeb41efa30a1ef
The patch here adds Kconfig, Makefile.inc and devicetree.cb files to
match 2014/04/05 release tarball config.h and static.c files.
Change-Id: Id61270b4d484f712a5c0e780a01fc81f1550b9ad
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/8325
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/mainboard/pcengines/apu1/BiosCallOuts.c')
| -rw-r--r-- | src/mainboard/pcengines/apu1/BiosCallOuts.c | 27 |
1 files changed, 26 insertions, 1 deletions
diff --git a/src/mainboard/pcengines/apu1/BiosCallOuts.c b/src/mainboard/pcengines/apu1/BiosCallOuts.c index 74b9f67395..d97fe22153 100644 --- a/src/mainboard/pcengines/apu1/BiosCallOuts.c +++ b/src/mainboard/pcengines/apu1/BiosCallOuts.c @@ -19,12 +19,14 @@ #include "AGESA.h" #include "amdlib.h" +#include <spd_cache.h> #include <northbridge/amd/agesa/BiosCallOuts.h> #include "heapManager.h" #include "SB800.h" #include <stdlib.h> static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINT32 Data, VOID *ConfigPtr); +static AGESA_STATUS board_ReadSpd_from_cbfs(UINT32 Func, UINT32 Data, VOID *ConfigPtr); const BIOS_CALLOUT_STRUCT BiosCallouts[] = { @@ -32,7 +34,7 @@ const BIOS_CALLOUT_STRUCT BiosCallouts[] = {AGESA_DEALLOCATE_BUFFER, agesa_DeallocateBuffer }, {AGESA_LOCATE_BUFFER, agesa_LocateBuffer }, {AGESA_DO_RESET, agesa_Reset }, - {AGESA_READ_SPD, agesa_ReadSpd }, + {AGESA_READ_SPD, board_ReadSpd_from_cbfs }, {AGESA_READ_SPD_RECOVERY, agesa_NoopUnsupported }, {AGESA_RUNFUNC_ONAP, agesa_RunFuncOnAp }, {AGESA_GNB_PCIE_SLOT_RESET, agesa_NoopSuccess }, @@ -51,3 +53,26 @@ static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINT32 Data, VOID *Config ((MEM_DATA_STRUCT*)ConfigPtr)->ParameterListPtr->DDR3Voltage = VOLT1_5; return AGESA_SUCCESS; } + +static AGESA_STATUS board_ReadSpd_from_cbfs(UINT32 Func, UINT32 Data, VOID *ConfigPtr) +{ + AGESA_STATUS Status = AGESA_UNSUPPORTED; +#ifdef __PRE_RAM__ + AGESA_READ_SPD_PARAMS *info = ConfigPtr; + u8 index = 0; + + if (info->MemChannelId > 0) + return AGESA_UNSUPPORTED; + if (info->SocketId != 0) + return AGESA_UNSUPPORTED; + if (info->DimmId != 0) + return AGESA_UNSUPPORTED; + + /* Read index 0, first SPD_SIZE bytes of spd.bin file. */ + if (read_spd_from_cbfs((u8*)info->Buffer, index) < 0) + die("No SPD data\n"); + + Status = AGESA_SUCCESS; +#endif + return Status; +} |