diff options
author | Michał Żygowski <michal.zygowski@3mdeb.com> | 2019-11-28 14:18:12 +0100 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2019-12-13 08:58:24 +0000 |
commit | bc979cc904db24dcc78779a11940e0ac2be303c0 (patch) | |
tree | 9c3851e87bc80a3fbf856143d9c2bea198ce773f /src/mainboard/pcengines/apu1/bootblock.c | |
parent | 3d5e1e5d52b83306bcc8a32fc26f89d7f25bbb09 (diff) | |
download | coreboot-bc979cc904db24dcc78779a11940e0ac2be303c0.tar.xz |
pcengines/apu1: Switch away from ROMCC_BOOTBLOCK
TEST=boot PC Engines apu1 with C bootblock patch and launch
Debian with Linux kernel 4.14.50
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: I36af6d3871a57f462a7508745663d9759de1c47d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37332
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/pcengines/apu1/bootblock.c')
-rw-r--r-- | src/mainboard/pcengines/apu1/bootblock.c | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/src/mainboard/pcengines/apu1/bootblock.c b/src/mainboard/pcengines/apu1/bootblock.c new file mode 100644 index 0000000000..2d34cba3bf --- /dev/null +++ b/src/mainboard/pcengines/apu1/bootblock.c @@ -0,0 +1,25 @@ +/* + * This file is part of the coreboot project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <bootblock_common.h> +#include <device/pnp_type.h> +#include <superio/nuvoton/common/nuvoton.h> +#include <superio/nuvoton/nct5104d/nct5104d.h> + +#define SIO_PORT 0x2e +#define SERIAL_DEV PNP_DEV(SIO_PORT, NCT5104D_SP1) + +void bootblock_mainboard_early_init(void) +{ + nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); +} |