pcengines/apu1: Fork of amd/persimmon

Drop persimmon customization for superio, azalia, PCI-e reset etc.

Change-Id: I35f49ca67e6cc2df826f24e5a4bb3db5bb6f711e
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/8324
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>

1 files changed, 89 insertions, 0 deletions

diff --git a/src/mainboard/pcengines/apu1/devicetree.cb b/src/mainboard/pcengines/apu1/devicetree.cb
new file mode 100644
index 0000000000..2f6bb14fc8
--- /dev/null
+++ b/src/mainboard/pcengines/apu1/devicetree.cb
@@ -0,0 +1,89 @@
+#
+# This file is part of the coreboot project.
+#
+# Copyright (C) 2011 Advanced Micro Devices, Inc.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+#
+chip northbridge/amd/agesa/family14/root_complex
+	device cpu_cluster 0 on
+			chip cpu/amd/agesa/family14
+			  device lapic 0 on end
+			end
+	end
+	device domain 0 on
+		subsystemid 0x1022 0x1510 inherit
+			chip northbridge/amd/agesa/family14 # CPU side of HT root complex
+#					device pci 18.0 on #  northbridge
+					chip northbridge/amd/agesa/family14 # PCI side of HT root complex
+						device pci 0.0 on end # Root Complex
+						device pci 1.0 on end # Internal Graphics P2P bridge 0x980[2456]
+						device pci 4.0 on end # PCIE P2P bridge on-board NIC
+						device pci 5.0 off end # PCIE P2P bridge
+						device pci 6.0 on end # PCIE P2P bridge PCIe slot
+						device pci 7.0 off end # PCIE P2P bridge
+						device pci 8.0 off end # NB/SB Link P2P bridge
+					end # agesa northbridge
+
+					chip southbridge/amd/cimx/sb800 # it is under NB/SB Link, but on the same pri bus
+						device pci 11.0 on end # SATA
+						device pci 12.0 on end # OHCI USB 0-4
+						device pci 12.2 on end # EHCI USB 0-4
+						device pci 13.0 on end # OHCI USB 5-9
+						device pci 13.2 on end # EHCI USB 5-9
+						device pci 14.0 on # SM
+						chip drivers/generic/generic #dimm 0-0-0
+							device i2c 50 on end
+						end
+						chip drivers/generic/generic #dimm 0-0-1
+							device i2c 51 on end
+						end
+					end # SM
+					device pci 14.1 on end # IDE	0x439c
+					device pci 14.2 on end # HDA	0x4383
+					device pci 14.3 on # LPC		0x439d
+				end #LPC
+				device pci 14.4 on  end # PCIB 0x4384, NOTE: PCI interface pins shared with GPIO {GPIO 35:0}
+				device pci 14.5 off end # OHCI FS/LS USB
+				device pci 14.6 off end # Hudson-E1 GbE MAC: Broadcom BCM5785 (14E4:1699)
+				device pci 15.0 off end # PCIe PortA
+				device pci 15.1 off end # PCIe PortB
+				device pci 15.2 off end # PCIe PortC
+				device pci 15.3 off end # PCIe PortD
+				device pci 16.0 off end # OHCI USB 10-13
+				device pci 16.2 off end # EHCI USB 10-13
+				register "gpp_configuration" = "0" #4:0:0:0 (really need to disable all 4 somehow)
+				register "boot_switch_sata_ide" = "0"	# 0: boot from SATA. 1: IDE
+
+			end	#southbridge/amd/cimx/sb800
+#			end #  device pci 18.0
+# These seem unnecessary
+			device pci 18.0 on end
+			device pci 18.1 on end
+			device pci 18.2 on end
+			device pci 18.3 on end
+			device pci 18.4 on end
+			device pci 18.5 on end
+			device pci 18.6 on end
+			device pci 18.7 on end
+
+			register "spdAddrLookup" = "
+			{
+				{ {0xA0, 0xA2}, {0x00, 0x00}, }, // socket 0 - Channel 0 & 1 - 8-bit SPD addresses
+				{ {0x00, 0x00}, {0x00, 0x00}, }, // socket 1 - Channel 0 & 1 - 8-bit SPD addresses
+			}"
+
+		end #chip northbridge/amd/agesa/family14 # CPU side of HT root complex
+	end #domain
+end #northbridge/amd/agesa/family14/root_complex