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authorKyösti Mälkki <kyosti.malkki@gmail.com>2014-11-14 16:20:22 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2015-02-23 21:34:21 +0100
commit8c190f3518d504d904692e93e7881c379b89f542 (patch)
tree007e007823bc87be9416573c389cf05259a5e212 /src/mainboard/pcengines/apu1/mptable.c
parentf09e6d47b8174017d8964780b916dec9dd0b2009 (diff)
downloadcoreboot-8c190f3518d504d904692e93e7881c379b89f542.tar.xz
pcengines/apu1: New board PC Engines APU1
While we cannot recreate exact copies of PC Engines APU1 firmware images, I shall upstream the vital changes for coreboot from the following tarballs SAGE has published to meet GPL: SageBios_PCEngines_APU_sources_for_publishing_20140405_GPL_package.tar.gz md5sum: ce5f54723e4fe3b63a1a3e35586728d4 pcengines.apu_139_osp.tar.gz md5sum: af6c8ab3b85d1a5a9fbeb41efa30a1ef The patch here adds Kconfig, Makefile.inc and devicetree.cb files to match 2014/04/05 release tarball config.h and static.c files. Change-Id: Id61270b4d484f712a5c0e780a01fc81f1550b9ad Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/8325 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/mainboard/pcengines/apu1/mptable.c')
-rw-r--r--src/mainboard/pcengines/apu1/mptable.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/pcengines/apu1/mptable.c b/src/mainboard/pcengines/apu1/mptable.c
index 0cf57bdcce..18bdb97d30 100644
--- a/src/mainboard/pcengines/apu1/mptable.c
+++ b/src/mainboard/pcengines/apu1/mptable.c
@@ -111,6 +111,8 @@ static void *smp_write_config_table(void *v)
/* on board NIC & Slot PCIE */
PCI_INT(0x1, 0x0, 0x0, intr_data_ptr[PIRQ_E]); /* Use INTE */
PCI_INT(0x2, 0x0, 0x0, intr_data_ptr[PIRQ_E]); /* Use INTE */
+ PCI_INT(0x3, 0x0, 0x0, intr_data_ptr[PIRQ_E]); /* Use INTE */
+ PCI_INT(0x4, 0x0, 0x0, intr_data_ptr[PIRQ_E]); /* Use INTE */
/* PCI slots */
device_t dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));