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author | Felix Held <felix-coreboot@felixheld.de> | 2015-11-06 18:31:01 +0100 |
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committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-11-19 02:43:12 +0100 |
commit | b06015b92ec0a44646d18ec32f2cb333e965e616 (patch) | |
tree | 8eb4be8e7ed74adf4fc5e9b83a5d7a2176e7f06d /src/mainboard/pcengines/apu1/platform_cfg.h | |
parent | 1455437c9e010bcc617c5927e18cf1cb3b02c82f (diff) | |
download | coreboot-b06015b92ec0a44646d18ec32f2cb333e965e616.tar.xz |
pcengines/apu1: disable unused clock outputs
disable unconnected FCH clock outputs to save some power
Change-Id: Ib3efebb8656392d58d762c23827168017d273de8
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: http://review.coreboot.org/12082
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/pcengines/apu1/platform_cfg.h')
-rw-r--r-- | src/mainboard/pcengines/apu1/platform_cfg.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/pcengines/apu1/platform_cfg.h b/src/mainboard/pcengines/apu1/platform_cfg.h index 946f238bdd..7172e8283e 100644 --- a/src/mainboard/pcengines/apu1/platform_cfg.h +++ b/src/mainboard/pcengines/apu1/platform_cfg.h @@ -69,12 +69,12 @@ * 0 - disable * 1 - enable * PCI SLOT 0 define at BIT0 - * PCI SLOT 1 define at BIT1 + * PCI SLOT 1 define at BIT1 -> connected to LPC devices * PCI SLOT 2 define at BIT2 * PCI SLOT 3 define at BIT3 * PCI SLOT 4 define at BIT4 */ -#define PCI_CLOCK_CTRL 0x1F +#define PCI_CLOCK_CTRL 0x02 /** * @def SATA_CONTROLLER |