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author | Patrick Georgi <pgeorgi@chromium.org> | 2017-01-28 15:59:25 +0100 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2017-02-10 18:04:33 +0100 |
commit | 0e3c59e258e0eb1cabe2ab15286f73efbf36294d (patch) | |
tree | 34ce31fdbe63d962681ace395fd54436411cb7f9 /src/mainboard/pcengines/apu1 | |
parent | 2e08b59cdcf9a26ae9e6d4107be8e45a5fb9dbdf (diff) | |
download | coreboot-0e3c59e258e0eb1cabe2ab15286f73efbf36294d.tar.xz |
ddr3 spd: move accessor code into lib/spd_bin.c
It's an attempt to consolidate the access code, even if there are still
multiple implementations in the code.
Change-Id: I4b2b9cbc24a445f8fa4e0148f52fd15950535240
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/18265
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/pcengines/apu1')
-rw-r--r-- | src/mainboard/pcengines/apu1/BiosCallOuts.c | 2 | ||||
-rw-r--r-- | src/mainboard/pcengines/apu1/Kconfig | 1 |
2 files changed, 1 insertions, 2 deletions
diff --git a/src/mainboard/pcengines/apu1/BiosCallOuts.c b/src/mainboard/pcengines/apu1/BiosCallOuts.c index f35cbd2215..7604277346 100644 --- a/src/mainboard/pcengines/apu1/BiosCallOuts.c +++ b/src/mainboard/pcengines/apu1/BiosCallOuts.c @@ -15,7 +15,7 @@ #include "AGESA.h" #include "amdlib.h" -#include <spd_cache.h> +#include <spd_bin.h> #include <northbridge/amd/agesa/BiosCallOuts.h> #include "heapManager.h" #include "SB800.h" diff --git a/src/mainboard/pcengines/apu1/Kconfig b/src/mainboard/pcengines/apu1/Kconfig index f882b78010..5e927cc95e 100644 --- a/src/mainboard/pcengines/apu1/Kconfig +++ b/src/mainboard/pcengines/apu1/Kconfig @@ -29,7 +29,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_OPTION_TABLE select HAVE_CMOS_DEFAULT select BOARD_ROMSIZE_KB_2048 - select SPD_CACHE config MAINBOARD_DIR string |