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authorKamil Wcislo <kamil.wcislo@3mdeb.com>2017-10-12 11:55:16 +0200
committerMartin Roth <martinroth@google.com>2017-10-20 02:19:23 +0000
commit70b92456eb2f507b6d6ce24212219e7dfbb59747 (patch)
treef4eb46df82cf87dffb01e1202d118f491d8eb92c /src/mainboard/pcengines/apu2/Makefile.inc
parent6a35fab2723f3b1ca288cd9224d263570cfbe184 (diff)
downloadcoreboot-70b92456eb2f507b6d6ce24212219e7dfbb59747.tar.xz
mainboard/pcengines/apu2: add apu3 and apu5 variants
Apu3 and apu5 are additional variants of apu2 board. Apu3 has no LPC connector exposed, but has additional USB header. It has also 2 slots for SIM cards and one of the gpios is used to control switching between them. Apu5 is differing by having 6 SIM card slots (3 SIMSWAP switches). This patch adds support for those other variants by not introducing additional code redundancy. Change-Id: I4fded98fed7a8085062cdea035ecac3d608cd2a0 Signed-off-by: Kamil Wcislo <kamil.wcislo@3mdeb.com> Reviewed-on: https://review.coreboot.org/21981 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/pcengines/apu2/Makefile.inc')
-rw-r--r--src/mainboard/pcengines/apu2/Makefile.inc2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/pcengines/apu2/Makefile.inc b/src/mainboard/pcengines/apu2/Makefile.inc
index 3724b1748e..0e897400ec 100644
--- a/src/mainboard/pcengines/apu2/Makefile.inc
+++ b/src/mainboard/pcengines/apu2/Makefile.inc
@@ -24,3 +24,5 @@ ramstage-y += gpio_ftns.c
# Order of names in SPD_SOURCES is important!
SPD_SOURCES = HYNIX-2G-1333
SPD_SOURCES += HYNIX-4G-1333-ECC
+
+subdirs-y += variants/$(VARIANT_DIR)