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author | Michał Żygowski <michal.zygowski@3mdeb.com> | 2018-07-30 12:31:00 +0200 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2018-08-04 15:20:12 +0000 |
commit | 6837769a9028f91b502bab98ae30b9167ca8837f (patch) | |
tree | d5ebc7bb6904aa20516590d5aa00c6b15ca48e88 /src/mainboard/pcengines/apu2/gpio_ftns.c | |
parent | a4432f469a97b4279cb53b79acd5c835e0880981 (diff) | |
download | coreboot-6837769a9028f91b502bab98ae30b9167ca8837f.tar.xz |
mb/pcengines/apu2: turn LED 2 and LED 3 off in final stage
Due to vendor's requirements LED 2 and LED 3 should be turned
off in late boot process. Add appropriate functions to read and
write GPIO status.
Change-Id: Ia286ef7d02cfcefacf0e8d358847406efe1496fb
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Reviewed-on: https://review.coreboot.org/27729
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/mainboard/pcengines/apu2/gpio_ftns.c')
-rw-r--r-- | src/mainboard/pcengines/apu2/gpio_ftns.c | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/src/mainboard/pcengines/apu2/gpio_ftns.c b/src/mainboard/pcengines/apu2/gpio_ftns.c index 58dedffe9d..f3939cd2a1 100644 --- a/src/mainboard/pcengines/apu2/gpio_ftns.c +++ b/src/mainboard/pcengines/apu2/gpio_ftns.c @@ -38,6 +38,23 @@ void configure_gpio(u32 iomux_gpio, u8 iomux_ftn, u32 gpio, u32 setting) iomux_ftn & 0x3); } +u8 read_gpio(u32 gpio) +{ + u32 status = read32((const volatile void *)(ACPI_MMIO_BASE + GPIO_OFFSET + + gpio)); + + return (status & GPIO_PIN_STS) ? 1 : 0; +} + +void write_gpio(u32 gpio, u8 value) +{ + u32 status = read32((const volatile void *)(ACPI_MMIO_BASE + GPIO_OFFSET + + gpio)); + status &= ~GPIO_OUTPUT_VALUE; + status |= (value > 0) ? GPIO_OUTPUT_VALUE : 0; + write32((volatile void *)(ACPI_MMIO_BASE + GPIO_OFFSET + gpio), status); +} + int get_spd_offset(void) { u8 index = 0; |