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| author | Arthur Heymans <arthur@aheymans.xyz> | 2017-05-12 21:16:41 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2017-09-23 11:06:25 +0000 |
| commit | b29078e4015bbc3e8cf00ba64f0799c087546563 (patch) | |
| tree | 57c64e181ce902a4babcd7b031f699f6db5d93bd /src/mainboard/pcengines/apu2 | |
| parent | 1850aa6df6a324960bd0873277660d84562cdb61 (diff) | |
| download | coreboot-b29078e4015bbc3e8cf00ba64f0799c087546563.tar.xz | |
mb/*/*: Remove rtc nvram configurable baud rate
There have been discussions about removing this since it does not seem
to be used much and only creates troubles for boards without defaults,
not to mention that it was configurable on many boards that do not
even feature uart.
It is still possible to configure the baudrate through the Kconfig
option.
Change-Id: I71698d9b188eeac73670b18b757dff5fcea0df41
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/19682
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/mainboard/pcengines/apu2')
| -rw-r--r-- | src/mainboard/pcengines/apu2/cmos.layout | 10 |
1 files changed, 1 insertions, 9 deletions
diff --git a/src/mainboard/pcengines/apu2/cmos.layout b/src/mainboard/pcengines/apu2/cmos.layout index d83bb14d26..1b7e9c35c9 100644 --- a/src/mainboard/pcengines/apu2/cmos.layout +++ b/src/mainboard/pcengines/apu2/cmos.layout @@ -19,7 +19,7 @@ entries 0 384 r 0 reserved_memory 384 1 e 4 boot_option 388 4 r 0 reboot_bits -392 3 e 5 baud_rate +#392 3 r 0 unused 395 1 e 1 hw_scrubber 396 1 e 1 interleave_chip_selects 397 2 e 8 max_mem_clock @@ -44,14 +44,6 @@ enumerations 2 1 Disable 4 0 Fallback 4 1 Normal -5 0 115200 -5 1 57600 -5 2 38400 -5 3 19200 -5 4 9600 -5 5 4800 -5 6 2400 -5 7 1200 6 6 Notice 6 7 Info 6 8 Debug |