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| author | Subrata Banik <subrata.banik@intel.com> | 2019-11-01 16:32:01 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2019-11-04 08:20:39 +0000 |
| commit | 55a2149903299af53c2e1dc4a3176d91027024b7 (patch) | |
| tree | c4ba8fae8431e59ceedb4d74dc80905d815b39e1 /src/mainboard/pcengines | |
| parent | 14d59912f8cdbec7e0121042c43e5728dc361509 (diff) | |
| download | coreboot-55a2149903299af53c2e1dc4a3176d91027024b7.tar.xz | |
soc/intel/icelake: Make use of "all-y"
This patch makes use of "all-y" in order to replace all common stage (bootblock, verstage,
romstage, postcar, ramstage) files inclusion in Makefile.inc
Change-Id: I11001d0d381ec9c1df41bc331da845f51e666a44
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36546
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/pcengines')
0 files changed, 0 insertions, 0 deletions