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authorJulius Werner <jwerner@chromium.org>2019-03-07 17:07:26 -0800
committerPatrick Georgi <pgeorgi@google.com>2019-03-25 11:03:49 +0000
commit5d1f9a009647c741e8587015b14f1e852e1c489e (patch)
treeb6e87bac2f8a578b7bee6b73111e04bd3750eeb8 /src/mainboard/pcengines
parent2de19038beffa154eefe40755b607aa9f94d9f9f (diff)
downloadcoreboot-5d1f9a009647c741e8587015b14f1e852e1c489e.tar.xz
Fix up remaining boolean uses of CONFIG_XXX to CONFIG(XXX)
This patch cleans up remaining uses of raw boolean Kconfig values I could find by wrapping them with CONFIG(). The remaining naked config value warnings in the code should all be false positives now (although the process was semi-manual and involved some eyeballing so I may have missed a few). Change-Id: Ifa0573a535addc3354a74e944c0920befb0666be Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31813 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/mainboard/pcengines')
-rw-r--r--src/mainboard/pcengines/apu1/mainboard.c12
-rw-r--r--src/mainboard/pcengines/apu2/BiosCallOuts.c2
2 files changed, 7 insertions, 7 deletions
diff --git a/src/mainboard/pcengines/apu1/mainboard.c b/src/mainboard/pcengines/apu1/mainboard.c
index 79a54b51eb..e5e30e031c 100644
--- a/src/mainboard/pcengines/apu1/mainboard.c
+++ b/src/mainboard/pcengines/apu1/mainboard.c
@@ -139,16 +139,16 @@ static void config_gpio_mux(void)
uart = dev_find_slot_pnp(SIO_PORT, NCT5104D_SP3);
gpio = dev_find_slot_pnp(SIO_PORT, NCT5104D_GPIO0);
if (uart)
- uart->enabled = CONFIG_APU1_PINMUX_UART_C;
+ uart->enabled = CONFIG(APU1_PINMUX_UART_C);
if (gpio)
- gpio->enabled = CONFIG_APU1_PINMUX_GPIO0;
+ gpio->enabled = CONFIG(APU1_PINMUX_GPIO0);
uart = dev_find_slot_pnp(SIO_PORT, NCT5104D_SP4);
gpio = dev_find_slot_pnp(SIO_PORT, NCT5104D_GPIO1);
if (uart)
- uart->enabled = CONFIG_APU1_PINMUX_UART_D;
+ uart->enabled = CONFIG(APU1_PINMUX_UART_D);
if (gpio)
- gpio->enabled = CONFIG_APU1_PINMUX_GPIO1;
+ gpio->enabled = CONFIG(APU1_PINMUX_GPIO1);
}
static void pnp_raw_resource(struct device *dev, u8 reg, u8 val)
@@ -165,11 +165,11 @@ static void config_addon_uart(void)
struct device *uart;
uart = dev_find_slot_pnp(SIO_PORT, NCT5104D_SP3);
- if (uart && uart->enabled && CONFIG_UART_C_RS485)
+ if (uart && uart->enabled && CONFIG(UART_C_RS485))
pnp_raw_resource(uart, 0xf2, 0x12);
uart = dev_find_slot_pnp(SIO_PORT, NCT5104D_SP4);
- if (uart && uart->enabled && CONFIG_UART_D_RS485)
+ if (uart && uart->enabled && CONFIG(UART_D_RS485))
pnp_raw_resource(uart, 0xf2, 0x12);
}
diff --git a/src/mainboard/pcengines/apu2/BiosCallOuts.c b/src/mainboard/pcengines/apu2/BiosCallOuts.c
index 8fc3d5a9ff..535024a86f 100644
--- a/src/mainboard/pcengines/apu2/BiosCallOuts.c
+++ b/src/mainboard/pcengines/apu2/BiosCallOuts.c
@@ -69,7 +69,7 @@ static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINTN FchData, VOID *ConfigPtr)
FCH_RESET_DATA_BLOCK *FchParams = (FCH_RESET_DATA_BLOCK *) FchData;
printk(BIOS_DEBUG, "Fch OEM config in INIT RESET ");
//FchParams_reset->EcChannel0 = TRUE; /* logical devicd 3 */
- FchParams->LegacyFree = CONFIG_HUDSON_LEGACY_FREE;
+ FchParams->LegacyFree = CONFIG(HUDSON_LEGACY_FREE);
FchParams->FchReset.SataEnable = hudson_sata_enable();
FchParams->FchReset.IdeEnable = hudson_ide_enable();
FchParams->FchReset.Xhci0Enable = CONFIG(HUDSON_XHCI_ENABLE);