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| author | Uwe Hermann <uwe@hermann-uwe.de> | 2010-11-21 22:47:22 +0000 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2010-11-21 22:47:22 +0000 |
| commit | 7b997053eb2fcde464f5f6a1e5c85d1ffb6b4e32 (patch) | |
| tree | 5339d014fbd29d3eb27cc82987eb7d655d9d8d1a /src/mainboard/pcengines | |
| parent | 57b2ff886e0ce2c92820f5722c8031def3ac94cf (diff) | |
| download | coreboot-7b997053eb2fcde464f5f6a1e5c85d1ffb6b4e32.tar.xz | |
Simplify a few code chunks, fix whitespace and indentation.
Also, remove some less useful comments, some dead code / unused functions.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6108 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/pcengines')
| -rw-r--r-- | src/mainboard/pcengines/alix1c/romstage.c | 10 | ||||
| -rw-r--r-- | src/mainboard/pcengines/alix2d/romstage.c | 8 |
2 files changed, 4 insertions, 14 deletions
diff --git a/src/mainboard/pcengines/alix1c/romstage.c b/src/mainboard/pcengines/alix1c/romstage.c index ca87afb73c..209485ec64 100644 --- a/src/mainboard/pcengines/alix1c/romstage.c +++ b/src/mainboard/pcengines/alix1c/romstage.c @@ -36,9 +36,7 @@ #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) /* The ALIX1.C has no SMBus; the setup is hard-wired. */ -static void cs5536_enable_smbus(void) -{ -} +static void cs5536_enable_smbus(void) { } #include "southbridge/amd/cs5536/cs5536_early_setup.c" #include "superio/winbond/w83627hf/w83627hf_early_serial.c" @@ -114,11 +112,6 @@ static u8 spd_read_byte(u8 device, u8 address) #include "cpu/amd/model_lx/syspreinit.c" #include "cpu/amd/model_lx/msrinit.c" -/** Early mainboard specific GPIO setup. */ -static void mb_gpio_init(void) -{ -} - void main(unsigned long bist) { static const struct mem_controller memctrl[] = { @@ -137,7 +130,6 @@ void main(unsigned long bist) */ cs5536_disable_internal_uart(); w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); - mb_gpio_init(); uart_init(); console_init(); diff --git a/src/mainboard/pcengines/alix2d/romstage.c b/src/mainboard/pcengines/alix2d/romstage.c index fd2298ce88..9fd001ca17 100644 --- a/src/mainboard/pcengines/alix2d/romstage.c +++ b/src/mainboard/pcengines/alix2d/romstage.c @@ -36,9 +36,7 @@ #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) /* The ALIX.2D has no SMBus; the setup is hard-wired. */ -static void cs5536_enable_smbus(void) -{ -} +static void cs5536_enable_smbus(void) { } #include "southbridge/amd/cs5536/cs5536_early_setup.c" @@ -128,13 +126,13 @@ static void mb_gpio_init(void) * Ugly workaround: $ wrmsr 0x5140000C 0xf00100006100 * This resets the GPIO I/O space to 0x6100. * This may break other things, though. - */ + */ outl(1 << 6, GPIO_IO_BASE + GPIOL_OUTPUT_ENABLE); outl(1 << 9, GPIO_IO_BASE + GPIOH_OUTPUT_ENABLE); outl(1 << 11, GPIO_IO_BASE + GPIOH_OUTPUT_ENABLE); /* outl(1 << 6, GPIO_IO_BASE + GPIOL_OUTPUT_VALUE); */ /* Led 1 enabled */ - outl(1 << 9, GPIO_IO_BASE + GPIOH_OUTPUT_VALUE); /* Led 2 disabled */ + outl(1 << 9, GPIO_IO_BASE + GPIOH_OUTPUT_VALUE); /* Led 2 disabled */ outl(1 << 11, GPIO_IO_BASE + GPIOH_OUTPUT_VALUE); /* Led 3 disabled */ } |