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authorMatt DeVillier <matt.devillier@gmail.com>2017-06-22 15:54:07 -0400
committerMartin Roth <martinroth@google.com>2017-10-23 16:56:37 +0000
commitfb1cd09596cfbbaa3b4ec7ec45b6ec8d8fa52411 (patch)
treee1bac936617080050542518c8dc312917100b893 /src/mainboard/purism/librem13v2/Kconfig
parent9b6384c1a585f1d34b99025281aa9dfd4ed19735 (diff)
downloadcoreboot-fb1cd09596cfbbaa3b4ec7ec45b6ec8d8fa52411.tar.xz
purism/librem13v2: migrate from FSP 1.1 to 2.0
Migrate the Librem13v2 from using FSP 1.1 to the public/GitHub FSP 2.0 Skylake/Kabylake release: - select FSP 2.0 in Kconfig - adjust romstage/ramstage functions as required - refactor pei_data functions - remove VR_RING domain from devicetree (unsupported in FSP 2.0) - add SataSpeedLimit parameter to work around power-related issue when operating at SATA 6.0Gbps speed TEST: build/boot Librem13v2, observe successful boot, lack of SATA-related errors in dmesg. Change-Id: Iedcc18d7279409ccd36deb0001567b0aa5197adf Signed-off-by: Youness Alaoui <youness.alaoui@puri.sm> Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/22046 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Youness Alaoui <snifikino@gmail.com> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/purism/librem13v2/Kconfig')
-rw-r--r--src/mainboard/purism/librem13v2/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/purism/librem13v2/Kconfig b/src/mainboard/purism/librem13v2/Kconfig
index 8522797f6e..5a279551a7 100644
--- a/src/mainboard/purism/librem13v2/Kconfig
+++ b/src/mainboard/purism/librem13v2/Kconfig
@@ -9,6 +9,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select SOC_INTEL_SKYLAKE
# Workaround for EC/KBC IRQ1
select SERIRQ_CONTINUOUS_MODE
+ select MAINBOARD_USES_FSP2_0
config IRQ_SLOT_COUNT
int