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author | Matt DeVillier <matt.devillier@puri.sm> | 2020-04-30 16:12:05 -0500 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2020-05-02 17:07:47 +0000 |
commit | 819005332b37a424cbeeb7cc75fc9a154b55fcfb (patch) | |
tree | aa1485471f44dfefc1df24f6034fcdc29f6ac811 /src/mainboard/purism/librem_bdw/variants/librem13v1/devicetree.cb | |
parent | eba32d217a7979dc1fa860c325351f86b98feb13 (diff) | |
download | coreboot-819005332b37a424cbeeb7cc75fc9a154b55fcfb.tar.xz |
mb/purism/librem_bdw: Convert to use override devicetree
Since the variants' devicetrees are almost identical, convert to
using an overridetree setup for simplicity.
Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
Change-Id: I07fb5a09e578bf299081b26e010317385a6c5f7f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40915
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard/purism/librem_bdw/variants/librem13v1/devicetree.cb')
-rw-r--r-- | src/mainboard/purism/librem_bdw/variants/librem13v1/devicetree.cb | 72 |
1 files changed, 0 insertions, 72 deletions
diff --git a/src/mainboard/purism/librem_bdw/variants/librem13v1/devicetree.cb b/src/mainboard/purism/librem_bdw/variants/librem13v1/devicetree.cb deleted file mode 100644 index 98b5163b5f..0000000000 --- a/src/mainboard/purism/librem_bdw/variants/librem13v1/devicetree.cb +++ /dev/null @@ -1,72 +0,0 @@ -chip soc/intel/broadwell - - # Enable eDP Hotplug with 6ms pulse - register "gpu_dp_d_hotplug" = "0x06" - - # Enable DDI1 Hotplug with 6ms pulse - register "gpu_dp_b_hotplug" = "0x06" - - # Set backlight PWM value for eDP - register "gpu_pch_backlight_pwm_hz" = "200" - - # Enable Panel and configure power delays - register "gpu_panel_port_select" = "1" # eDP - register "gpu_panel_power_cycle_delay" = "6" # 500ms - register "gpu_panel_power_up_delay" = "2000" # 200ms - register "gpu_panel_power_down_delay" = "500" # 50ms - register "gpu_panel_power_backlight_on_delay" = "2000" # 200ms - register "gpu_panel_power_backlight_off_delay" = "2000" # 200ms - - # EC host command ranges are in 0x380-0x383 & 0x80-0x8f - register "gen1_dec" = "0x00000381" - register "gen2_dec" = "0x000c0081" - - # Port 0 is HDD - # Port 3 is M.2 NGFF - register "sata_port_map" = "0x9" - - # Port 0 tuning for link stability - register "sata_port0_gen3_dtle" = "9" - register "sata_port3_gen3_dtle" = "9" - - device cpu_cluster 0 on - device lapic 0 on end - end - device domain 0 on - device pci 00.0 on end # host bridge - device pci 02.0 on end # vga controller - device pci 03.0 on end # mini-hd audio - device pci 13.0 off end # Smart Sound Audio DSP - device pci 14.0 on end # USB3 XHCI - device pci 15.0 off end # Serial I/O DMA - device pci 15.1 off end # I2C0 - device pci 15.2 off end # I2C1 - device pci 15.3 off end # GSPI0 - device pci 15.4 off end # GSPI1 - device pci 15.5 off end # UART0 - device pci 15.6 off end # UART1 - device pci 16.0 off end # Management Engine Interface 1 - device pci 16.1 off end # Management Engine Interface 2 - device pci 16.2 off end # Management Engine IDE-R - device pci 16.3 off end # Management Engine KT - device pci 17.0 off end # SDIO - device pci 19.0 off end # GbE - device pci 1b.0 on end # High Definition Audio - device pci 1c.0 on end # PCIe Port #1 - device pci 1c.1 off end # PCIe Port #2 - device pci 1c.2 on end # PCIe Port #3 - LAN - device pci 1c.3 on end # PCIe Port #4 - WiFi - device pci 1c.4 on end # PCIe Port #5 - device pci 1c.5 on end # PCIe Port #6 - M.2 NVMe - device pci 1d.0 off end # USB2 EHCI - device pci 1e.0 off end # PCI bridge - device pci 1f.0 on - chip ec/purism/librem - device pnp 0c09.0 on end - end - end # LPC bridge - device pci 1f.2 on end # SATA Controller - device pci 1f.3 on end # SMBus - device pci 1f.6 off end # Thermal - end -end |