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author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-06-09 11:59:00 +0200 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2018-06-14 09:32:34 +0000 |
commit | b0f1988f893bf5f581917816b11e810309955143 (patch) | |
tree | c4bcf6f1d9384b99cfcbfab4426de9f9f106e720 /src/mainboard/purism/librem_skl | |
parent | 68c851bcd702e7816cdb6e504f7386ec404ecf13 (diff) | |
download | coreboot-b0f1988f893bf5f581917816b11e810309955143.tar.xz |
src: Get rid of unneeded whitespace
Change-Id: I630d49ab504d9f6e052806b516a600fa41b9a8da
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26991
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard/purism/librem_skl')
-rw-r--r-- | src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb | 20 | ||||
-rw-r--r-- | src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb | 20 |
2 files changed, 20 insertions, 20 deletions
diff --git a/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb b/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb index 18dffcf2b5..08ba50607b 100644 --- a/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb +++ b/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb @@ -64,10 +64,10 @@ chip soc/intel/skylake register "HeciEnabled" = "0" register "SaGv" = "3" register "SerialIrqConfigSirqEnable" = "1" - register "PmConfigSlpS3MinAssert" = "2" # 50ms - register "PmConfigSlpS4MinAssert" = "1" # 1s - register "PmConfigSlpSusMinAssert" = "3" # 500ms - register "PmConfigSlpAMinAssert" = "3" # 2s + register "PmConfigSlpS3MinAssert" = "2" # 50ms + register "PmConfigSlpS4MinAssert" = "1" # 1s + register "PmConfigSlpSusMinAssert" = "3" # 500ms + register "PmConfigSlpAMinAssert" = "3" # 2s register "PmTimerDisabled" = "0" register "pirqa_routing" = "PCH_IRQ11" @@ -211,12 +211,12 @@ chip soc/intel/skylake device pci 1d.2 off end # PCI Express Port 11 device pci 1d.3 off end # PCI Express Port 12 device pci 1f.0 on - chip ec/purism/librem - device pnp 0c09.0 on end - end - chip drivers/pc80/tpm - device pnp 0c31.0 on end - end + chip ec/purism/librem + device pnp 0c09.0 on end + end + chip drivers/pc80/tpm + device pnp 0c31.0 on end + end end # LPC Interface device pci 1f.1 on end # P2SB device pci 1f.2 on end # Power Management Controller diff --git a/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb b/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb index 01445dcb8f..4ba6ccddba 100644 --- a/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb +++ b/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb @@ -64,10 +64,10 @@ chip soc/intel/skylake register "HeciEnabled" = "0" register "SaGv" = "3" register "SerialIrqConfigSirqEnable" = "1" - register "PmConfigSlpS3MinAssert" = "2" # 50ms - register "PmConfigSlpS4MinAssert" = "1" # 1s - register "PmConfigSlpSusMinAssert" = "3" # 500ms - register "PmConfigSlpAMinAssert" = "3" # 2s + register "PmConfigSlpS3MinAssert" = "2" # 50ms + register "PmConfigSlpS4MinAssert" = "1" # 1s + register "PmConfigSlpSusMinAssert" = "3" # 500ms + register "PmConfigSlpAMinAssert" = "3" # 2s register "PmTimerDisabled" = "0" register "pirqa_routing" = "PCH_IRQ11" @@ -218,12 +218,12 @@ chip soc/intel/skylake device pci 1d.2 off end # PCI Express Port 11 device pci 1d.3 off end # PCI Express Port 12 device pci 1f.0 on - chip ec/purism/librem - device pnp 0c09.0 on end - end - chip drivers/pc80/tpm - device pnp 0c31.0 on end - end + chip ec/purism/librem + device pnp 0c09.0 on end + end + chip drivers/pc80/tpm + device pnp 0c31.0 on end + end end # LPC Interface device pci 1f.1 on end # P2SB device pci 1f.2 on end # Power Management Controller |