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authorMaxim Polyakov <max.senia.poliak@gmail.com>2019-04-03 00:27:33 +0300
committerNico Huber <nico.h@gmx.de>2019-04-06 13:12:04 +0000
commit0bec504642a03c8a2a7a2a8f6d424c935f0c2cba (patch)
treee5318530f51a9514b2f743f41bf03daf9b4a4e16 /src/mainboard/purism
parentde08ae1080997d5ad232df183f9ce9724b1eb1e4 (diff)
downloadcoreboot-0bec504642a03c8a2a7a2a8f6d424c935f0c2cba.tar.xz
{mb,soc/intel/skylake}: remove unused InternalGfx
The InternalGfx option in devicetree.cb is not used to enable iGPU. The patch removes this option from chip.h and mb/*/devicetree.cb files for all boards with skl/kbl processor. Change-Id: I41ecca3fdfb1d4b20ee634a13263ff481dcf440e Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32171 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/mainboard/purism')
-rw-r--r--src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb1
-rw-r--r--src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb1
2 files changed, 0 insertions, 2 deletions
diff --git a/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb b/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb
index 8d2a436a5a..944a2dddb5 100644
--- a/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb
+++ b/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb
@@ -56,7 +56,6 @@ chip soc/intel/skylake
register "ScsEmmcHs400Enabled" = "0"
register "ScsSdCardEnabled" = "0"
register "PttSwitch" = "0"
- register "InternalGfx" = "1"
register "SkipExtGfxScan" = "1"
register "Device4Enable" = "1"
register "HeciEnabled" = "0"
diff --git a/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb b/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb
index 49af7b69f1..4ac06107a0 100644
--- a/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb
+++ b/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb
@@ -56,7 +56,6 @@ chip soc/intel/skylake
register "ScsEmmcHs400Enabled" = "0"
register "ScsSdCardEnabled" = "0"
register "PttSwitch" = "0"
- register "InternalGfx" = "1"
register "SkipExtGfxScan" = "1"
register "Device4Enable" = "1"
register "HeciEnabled" = "0"