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authorMichael Niewöhner <foss@mniewoehner.de>2021-04-10 22:51:15 +0200
committerMichael Niewöhner <foss@mniewoehner.de>2021-04-12 16:52:19 +0000
commitc5f1dc96bf0b18245d7986463ae56958c44d24f2 (patch)
treeed6b20f2b323d3ff835812aa98bf9450b177c4ec /src/mainboard/purism
parentc1ec940eba11d279912b24377a7cf8ab4b264aaa (diff)
downloadcoreboot-c5f1dc96bf0b18245d7986463ae56958c44d24f2.tar.xz
mb/*: drop LPC generic range for port 80
Port 80 (actually 0x80-0x8f) is a fixed I/O range and thus does not have to be set up as generic range. Drop the entries from the devicetrees. Change-Id: I8a54d3c35a321a2d57bd846662f7339eff53e5a8 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52237 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/mainboard/purism')
-rw-r--r--src/mainboard/purism/librem_bdw/devicetree.cb1
-rw-r--r--src/mainboard/purism/librem_skl/devicetree.cb1
2 files changed, 0 insertions, 2 deletions
diff --git a/src/mainboard/purism/librem_bdw/devicetree.cb b/src/mainboard/purism/librem_bdw/devicetree.cb
index 9995f6bd6f..b35d98469c 100644
--- a/src/mainboard/purism/librem_bdw/devicetree.cb
+++ b/src/mainboard/purism/librem_bdw/devicetree.cb
@@ -29,7 +29,6 @@ chip soc/intel/broadwell
chip soc/intel/broadwell/pch
# EC host command ranges are in 0x380-0x383 & 0x80-0x8f
register "gen1_dec" = "0x00000381"
- register "gen2_dec" = "0x000c0081"
device pci 13.0 off end # Smart Sound Audio DSP
device pci 14.0 on end # USB3 XHCI
diff --git a/src/mainboard/purism/librem_skl/devicetree.cb b/src/mainboard/purism/librem_skl/devicetree.cb
index c3a9567ccf..47a9a5cbc6 100644
--- a/src/mainboard/purism/librem_skl/devicetree.cb
+++ b/src/mainboard/purism/librem_skl/devicetree.cb
@@ -36,7 +36,6 @@ chip soc/intel/skylake
# EC host command ranges are in 0x380-0x383 & 0x80-0x8f
register "gen1_dec" = "0x00000381"
- register "gen2_dec" = "0x000c0081"
# Disable DPTF
register "dptf_enable" = "0"