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| author | Furquan Shaikh <furquan@chromium.org> | 2017-10-06 17:05:50 -0700 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2017-10-09 20:20:40 +0000 |
| commit | 219ebb969bb52eb88d49d6ce31dbfc0d7cabfc49 (patch) | |
| tree | 5597f190251338d86df7ee8706faa765d9ee4d5c /src/mainboard/purism | |
| parent | e9d8959c4f11399c7ec1609ecff204c8f3c9b3ea (diff) | |
| download | coreboot-219ebb969bb52eb88d49d6ce31dbfc0d7cabfc49.tar.xz | |
skylake mainboards: Use PAD_CFG_GPI_GPIO_DRIVER instead of PAD_CFG_GPI
Change 1760cd3e (soc/intel/skylake: Use common/block/gpio) updated all
skylake boards to use common gpio driver. Common gpio code
defines PAD_CFG_GPI without GPIO_DRIVER ownership. However, for
skylake PAD_CFG_GPI set GPIO_DRIVER ownership by default. This
resulted in Linux kernel failing to configure all GPIO IRQs since the
ownership was not set correctly. (Observed error in dmesg: "genirq:
Setting trigger mode 3 for irq 201
failed (intel_gpio_irq_type+0x0/0x110)")
This change fixes the above issue by replacing all uses of PAD_CFG_GPI
in skylake mainboards to PAD_CFG_GPI_GPIO_DRIVER.
BUG=b:67507004
TEST=Verified on soraka that the genirq error is no longer observed in
dmesg. Also, cat /proc/interrupts has the interrupts configured
correctly.
Change-Id: I7dab302f372e56864432100a56462b92d43060ee
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/21912
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/purism')
| -rw-r--r-- | src/mainboard/purism/librem13v2/gpio.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/purism/librem13v2/gpio.h b/src/mainboard/purism/librem13v2/gpio.h index e126a4256c..148e40b279 100644 --- a/src/mainboard/purism/librem13v2/gpio.h +++ b/src/mainboard/purism/librem13v2/gpio.h @@ -90,9 +90,9 @@ static const struct pad_config gpio_table[] = { /* UART1_TXD */ PAD_CFG_NC(GPP_C13), /* UART1_RTS# */ PAD_CFG_NC(GPP_C14), /* UART1_CTS# */ PAD_CFG_NC(GPP_C15), -/* I2C0_SDA */ PAD_CFG_GPI(GPP_C16, NONE, DEEP), -/* I2C0_SCL */ PAD_CFG_GPI(GPP_C17, NONE, DEEP), -/* I2C1_SDA */ PAD_CFG_GPI(GPP_C18, NONE, DEEP), +/* I2C0_SDA */ PAD_CFG_GPI_GPIO_DRIVER(GPP_C16, NONE, DEEP), +/* I2C0_SCL */ PAD_CFG_GPI_GPIO_DRIVER(GPP_C17, NONE, DEEP), +/* I2C1_SDA */ PAD_CFG_GPI_GPIO_DRIVER(GPP_C18, NONE, DEEP), /* I2C1_SCL */ PAD_CFG_NC(GPP_C19), /* UART2_RXD */ PAD_CFG_NC(GPP_C20), /* UART2_TXD */ PAD_CFG_NC(GPP_C21), |