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| author | Youness Alaoui <youness.alaoui@puri.sm> | 2018-03-02 16:12:04 -0500 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-04-06 06:42:15 +0000 |
| commit | cb8f04dc839cd8a339ba3bf55fd4627ff7e78903 (patch) | |
| tree | 0f689332b5fb0e63cdfa43340712fe6e1a08f7cf /src/mainboard/purism | |
| parent | 0601f1e164a95342a7c381603284c11a9a588804 (diff) | |
| download | coreboot-cb8f04dc839cd8a339ba3bf55fd4627ff7e78903.tar.xz | |
purism/librem_skl: Set TCC Activation at 95C
Set the Thermal Control Circuit (TCC) activaction value to 95C
even though FSP integration guide says to set it to 100C for SKL-U
(offset at 0), because when the TCC activates at 100C, the CPU
will have already shut itself down from overheating protection.
This was tested on Purism Librem 13 v2. A bisect showed that the
immediate shutdowns happened after commit [1] was merged which led
to this solution.
[1] ec5a947b (soc/intel/skylake: make tcc_offset take effect)
Change-Id: Idfc001c8e46ed3b07b24150c961c4b9bc9b71a62
Signed-off-by: Youness Alaoui <youness.alaoui@puri.sm>
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/25323
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard/purism')
| -rw-r--r-- | src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb | 6 | ||||
| -rw-r--r-- | src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb | 6 |
2 files changed, 12 insertions, 0 deletions
diff --git a/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb b/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb index 84932b2024..3d63f90f72 100644 --- a/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb +++ b/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb @@ -10,6 +10,12 @@ chip soc/intel/skylake register "eist_enable" = "1" register "VmxEnable" = "1" + # Set the Thermal Control Circuit (TCC) activaction value to 95C + # even though FSP integration guide says to set it to 100C for SKL-U + # (offset at 0), because when the TCC activates at 100C, the CPU + # will have already shut itself down from overheating protection. + register "tcc_offset" = "5" # TCC of 95C + # GPE configuration # Note that GPE events called out in ASL code rely on this # route. i.e. If this route changes then the affected GPE diff --git a/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb b/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb index 989c4ff485..eff7ecaac4 100644 --- a/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb +++ b/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb @@ -10,6 +10,12 @@ chip soc/intel/skylake register "eist_enable" = "1" register "VmxEnable" = "1" + # Set the Thermal Control Circuit (TCC) activaction value to 95C + # even though FSP integration guide says to set it to 100C for SKL-U + # (offset at 0), because when the TCC activates at 100C, the CPU + # will have already shut itself down from overheating protection. + register "tcc_offset" = "5" # TCC of 95C + # GPE configuration # Note that GPE events called out in ASL code rely on this # route. i.e. If this route changes then the affected GPE |