summaryrefslogtreecommitdiff
path: root/src/mainboard/razer
diff options
context:
space:
mode:
authorAngel Pons <th3fanbus@gmail.com>2019-12-19 22:41:06 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-12-31 15:16:57 +0000
commit408d1dac9e23250c0e485bbf934771f769b717c1 (patch)
tree984d2a88f61cb8e09cf3a42803dc40fa7c3edb61 /src/mainboard/razer
parentae863e2e25dba8ca80871551599fa79f7fac8e07 (diff)
downloadcoreboot-408d1dac9e23250c0e485bbf934771f769b717c1.tar.xz
mb/**/dsdt.asl: Remove outdated sleepstates.asl comment
Previously, each Intel chipset had its own sleepstates.asl file. However, this is no longer the case, so drop these comments. Change-Id: I50aba6e74f41e2fa498375b5eb6b7e993d06bcac Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37855 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-by: Wim Vervoorn <wvervoorn@eltan.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'src/mainboard/razer')
-rw-r--r--src/mainboard/razer/blade_stealth_kbl/dsdt.asl2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/razer/blade_stealth_kbl/dsdt.asl b/src/mainboard/razer/blade_stealth_kbl/dsdt.asl
index 0112654950..ef487451ea 100644
--- a/src/mainboard/razer/blade_stealth_kbl/dsdt.asl
+++ b/src/mainboard/razer/blade_stealth_kbl/dsdt.asl
@@ -42,7 +42,7 @@ DefinitionBlock(
}
}
- // Chipset specific sleep states
+
#include <southbridge/intel/common/acpi/sleepstates.asl>
#include "acpi/mainboard.asl"