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authorFelix Singer <felixsinger@posteo.net>2020-07-25 08:40:15 +0200
committerMichael Niewöhner <c0d3z3r0@review.coreboot.org>2020-07-29 20:47:56 +0000
commitffe90c528b0487ce47a123ae905be8823c5615ae (patch)
tree9d011606a5318d5d1da7a014cbc92dcf85ecc6ea /src/mainboard/razer
parent57c8143350bf357dd7edc13ddf735084eea53d07 (diff)
downloadcoreboot-ffe90c528b0487ce47a123ae905be8823c5615ae.tar.xz
soc/intel/skylake: Enable SMBus depending on devicetree configuration
Currently SMBus gets enabled by the option SmbusEnable, but this duplicates the devicetree on/off options. Therefore use the on/off options for the enablement of the SMBus controller. I checked all corresponding mainboards if the devicetree configuration matches the SmbusEnable setting. Change-Id: I0d9ec1888c82cc6d5ef86d0694269c885ba62c41 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43845 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner
Diffstat (limited to 'src/mainboard/razer')
-rw-r--r--src/mainboard/razer/blade_stealth_kbl/devicetree.cb1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mainboard/razer/blade_stealth_kbl/devicetree.cb b/src/mainboard/razer/blade_stealth_kbl/devicetree.cb
index 8a369b79b9..7e96fe269e 100644
--- a/src/mainboard/razer/blade_stealth_kbl/devicetree.cb
+++ b/src/mainboard/razer/blade_stealth_kbl/devicetree.cb
@@ -37,7 +37,6 @@ chip soc/intel/skylake
register "IoBufferOwnership" = "0"
register "EnableTraceHub" = "0"
register "SsicPortEnable" = "0"
- register "SmbusEnable" = "1"
register "Cio2Enable" = "0"
register "ScsEmmcEnabled" = "0"
register "ScsEmmcHs400Enabled" = "0"