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authorJoseph Smith <joe@settoplinux.org>2009-05-08 00:24:24 +0000
committerJoseph Smith <joe@smittys.pointclark.net>2009-05-08 00:24:24 +0000
commit9b04724a0a8db6089f4a175dc34550bc3c50a400 (patch)
tree58ca264d2ad992dfe538783f1e837b32ef6c631e /src/mainboard/rca/rm4100
parent06025df741a9c812040a0a80167a8b8f5da9962f (diff)
downloadcoreboot-9b04724a0a8db6089f4a175dc34550bc3c50a400.tar.xz
Set up PIRQs in mainboard Config.lb for IP1000 and RM4100 instead of using the ones in i82801xx_lpc.c.
Signed-off-by: Joseph Smith <joe@settoplinux.org> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4259 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/rca/rm4100')
-rw-r--r--src/mainboard/rca/rm4100/Config.lb9
1 files changed, 9 insertions, 0 deletions
diff --git a/src/mainboard/rca/rm4100/Config.lb b/src/mainboard/rca/rm4100/Config.lb
index c08b7d4b4a..f1de31c74f 100644
--- a/src/mainboard/rca/rm4100/Config.lb
+++ b/src/mainboard/rca/rm4100/Config.lb
@@ -80,6 +80,15 @@ chip northbridge/intel/i82830 # Northbridge
register "rom_address" = "0xfff00000"
end
chip southbridge/intel/i82801xx # Southbridge
+ register "pirqa_routing" = "0x07"
+ register "pirqb_routing" = "0x09"
+ register "pirqc_routing" = "0x0a"
+ register "pirqd_routing" = "0x09"
+ register "pirqe_routing" = "0x05"
+ register "pirqf_routing" = "0x80"
+ register "pirqg_routing" = "0x80"
+ register "pirqh_routing" = "0x0b"
+
device pci 1d.0 on end # USB UHCI Controller #1
device pci 1d.1 on end # USB UHCI Controller #2
device pci 1d.2 on end # USB UHCI Controller #3