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authorVladimir Serbinenko <phcoder@gmail.com>2014-10-25 15:18:25 +0200
committerVladimir Serbinenko <phcoder@gmail.com>2014-11-04 23:02:27 +0100
commitab83ef02c7131d23a28c6acbd79e6cd9997dcec8 (patch)
tree2a04f314104c3a43e6eaaacd5cceb5ec8db81386 /src/mainboard/roda/rk886ex/devicetree.cb
parent9c4f1b8e05fbd659ebdb3d03d811f1ad39079a1a (diff)
downloadcoreboot-ab83ef02c7131d23a28c6acbd79e6cd9997dcec8.tar.xz
i82801gx: Handle whole FADT in southbridge.
Do all the handling in SB code with few parameters from devicetree.cb instead of having mobo callbacks. Change-Id: I8fd02ff05553a3c51ea5f6ae66b8f5502509e2bc Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7199 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/mainboard/roda/rk886ex/devicetree.cb')
-rw-r--r--src/mainboard/roda/rk886ex/devicetree.cb4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/mainboard/roda/rk886ex/devicetree.cb b/src/mainboard/roda/rk886ex/devicetree.cb
index 7b9d7a193e..3fe8b2ae53 100644
--- a/src/mainboard/roda/rk886ex/devicetree.cb
+++ b/src/mainboard/roda/rk886ex/devicetree.cb
@@ -54,6 +54,10 @@ chip northbridge/intel/i945
register "gpi7_routing" = "2"
register "gpe0_en" = "0x20800007"
+ register "c3_latency" = "0x23"
+ register "docking_supported" = "1"
+ register "p_cnt_throttling_supported" = "1"
+
register "ide_legacy_combined" = "0x1"
register "ide_enable_primary" = "0x1"
register "ide_enable_secondary" = "0x0"