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authorDennis Wassenberg <dennis.wassenberg@secunet.com>2015-09-10 12:20:58 +0200
committerNico Huber <nico.h@gmx.de>2016-12-15 23:56:53 +0100
commitbd10516643893f0f0904109519220d65413285b5 (patch)
tree68c5c39d1a848dbc0f49fa5c6aa4be1764e0474a /src/mainboard/roda/rv11/romstage.c
parentf971dcbf25065384d52c41696684a30dad64f77d (diff)
downloadcoreboot-bd10516643893f0f0904109519220d65413285b5.tar.xz
mb/roda/rv11: Add new boards Lizard RV11 and RW11
The Roda Lizard RV11 is a comparatively lightweight, full-rugged notebook. It's based on a 17W TDP dual core Ivy Bridge CPU. The Lizard RW11 is its bigger brother (45W TDP quad core, more i/o options). The RV11 is the first board to use the native graphics initialization by libgfxinit. Tested so far, are the internal eDP port, DP and VGA. Change-Id: Iea283059ce3402dc36184baf16928b55285a9eeb Signed-off-by: Dennis Wassenberg <dennis.wassenberg@secunet.com> Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/17446 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/roda/rv11/romstage.c')
-rw-r--r--src/mainboard/roda/rv11/romstage.c38
1 files changed, 38 insertions, 0 deletions
diff --git a/src/mainboard/roda/rv11/romstage.c b/src/mainboard/roda/rv11/romstage.c
new file mode 100644
index 0000000000..7219b0b397
--- /dev/null
+++ b/src/mainboard/roda/rv11/romstage.c
@@ -0,0 +1,38 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2011 The ChromiumOS Authors. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <northbridge/intel/sandybridge/sandybridge.h>
+#include <southbridge/intel/bd82x6x/pch.h>
+
+void rcba_config(void)
+{
+ u32 reg32;
+
+ /* Disable unused devices (board specific) */
+ reg32 = RCBA32(FD);
+ reg32 |= PCH_DISABLE_ALWAYS;
+ /* Disable PCI bridge so MRC does not probe this bus */
+ reg32 |= PCH_DISABLE_P2P;
+ RCBA32(FD) = reg32;
+}
+
+void mainboard_early_init(int s3resume)
+{
+}
+
+int mainboard_should_reset_usb(int s3resume)
+{
+ return !s3resume;
+}