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authorArthur Heymans <arthur@aheymans.xyz>2019-06-16 23:36:28 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-10-16 14:08:29 +0000
commitd28d5071906e15c88939d889fbe40b117f5c303b (patch)
tree720d257987ba05695f2546b6fff0a180bde5b1b1 /src/mainboard/roda/rv11
parenta06689c7e7d88f74fd1d12f8f5055b5ea7bc741f (diff)
downloadcoreboot-d28d5071906e15c88939d889fbe40b117f5c303b.tar.xz
sb/intel/bd82x6x/lpc: Set up default LPC decode ranges
This sets up some common default LPC decode ranges in a common place. This may set up more decode ranges than needed but that typically does not hurt. Mainboards needing additional ranges can do so in the mainboard pch_enable_lpc hook. Change-Id: Ifeb5a862e56f415aa847d0118a33a31537ab8037 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33549 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/mainboard/roda/rv11')
-rw-r--r--src/mainboard/roda/rv11/variants/rv11/romstage.c4
-rw-r--r--src/mainboard/roda/rv11/variants/rw11/romstage.c8
2 files changed, 0 insertions, 12 deletions
diff --git a/src/mainboard/roda/rv11/variants/rv11/romstage.c b/src/mainboard/roda/rv11/variants/rv11/romstage.c
index 685e94237f..4491370cbf 100644
--- a/src/mainboard/roda/rv11/variants/rv11/romstage.c
+++ b/src/mainboard/roda/rv11/variants/rv11/romstage.c
@@ -23,10 +23,6 @@
void pch_enable_lpc(void)
{
- /* Enable KBC on 0x60/0x64 (KBC),
- EC on 0x62/0x66 (MC) */
- pci_write_config16(PCH_LPC_DEV, LPC_EN,
- KBC_LPC_EN | MC_LPC_EN);
}
void mainboard_config_superio(void)
diff --git a/src/mainboard/roda/rv11/variants/rw11/romstage.c b/src/mainboard/roda/rv11/variants/rw11/romstage.c
index 97d9d2b099..f355578b6e 100644
--- a/src/mainboard/roda/rv11/variants/rw11/romstage.c
+++ b/src/mainboard/roda/rv11/variants/rw11/romstage.c
@@ -27,14 +27,6 @@
void pch_enable_lpc(void)
{
- /* COMA on 0x3f8, COMB on 0x2f8 */
- pci_write_config16(PCH_LPC_DEV, LPC_IO_DEC, 0x0010);
- /* Enable KBC on 0x60/0x64 (KBC),
- EC on 0x62/0x66 (MC),
- SIO on 0x2e/0x2f (CNF1) */
- pci_write_config16(PCH_LPC_DEV, LPC_EN,
- CNF1_LPC_EN | MC_LPC_EN | KBC_LPC_EN |
- COMB_LPC_EN | COMA_LPC_EN);
}
void mainboard_config_superio(void)