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| author | Arthur Heymans <arthur@aheymans.xyz> | 2017-10-17 22:13:43 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-11-23 04:59:26 +0000 |
| commit | f1c8ede1a5bcf26f938b3f5a8cfefa8acd156505 (patch) | |
| tree | 8ca85c50eab6eb4f2fb79950273d4fffb2136169 /src/mainboard/roda | |
| parent | a35ad0e6ee7826dc1f171291116f306099c99e72 (diff) | |
| download | coreboot-f1c8ede1a5bcf26f938b3f5a8cfefa8acd156505.tar.xz | |
sb/intel/i82801ix: fetch initial timestamp in bootblock
TESTED on Thinkpad x200
Change-Id: I3cd286709f8734793dc6ae303215433eff29d25b
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/22077
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/roda')
| -rw-r--r-- | src/mainboard/roda/rk9/romstage.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/roda/rk9/romstage.c b/src/mainboard/roda/rk9/romstage.c index 9a8e34b18b..65ff0f8a84 100644 --- a/src/mainboard/roda/rk9/romstage.c +++ b/src/mainboard/roda/rk9/romstage.c @@ -125,7 +125,7 @@ void mainboard_romstage_entry(unsigned long bist) int cbmem_initted; u16 reg16; - timestamp_init(timestamp_get()); + timestamp_init(get_initial_timestamp()); timestamp_add_now(TS_START_ROMSTAGE); /* basic northbridge setup, including MMCONF BAR */ |