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authorStefan Reinauer <stepan@coresystems.de>2010-08-25 18:35:42 +0000
committerStefan Reinauer <stepan@openbios.org>2010-08-25 18:35:42 +0000
commitbc8613ecaf858419288f4cef784c562f3d8a5093 (patch)
tree767aeddf79a40354af772f1800c8629651b03857 /src/mainboard/roda
parent6f22ecc2c920b41f5c48d96030333d1874f67c8d (diff)
downloadcoreboot-bc8613ecaf858419288f4cef784c562f3d8a5093.tar.xz
Fix i945 based boards
- prevent GCC from inlining do_ram_command - it will break RAM initialization. - fix the PCIRST# mechanism in those boards that do it, it requires 200ms, not 200us - move PCIRST# as early as possible (before ich7_enable_lpc) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Corey Osgood <corey.osgood@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5740 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/roda')
-rw-r--r--src/mainboard/roda/rk886ex/romstage.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/mainboard/roda/rk886ex/romstage.c b/src/mainboard/roda/rk886ex/romstage.c
index 19b29053e3..00c4c9f446 100644
--- a/src/mainboard/roda/rk886ex/romstage.c
+++ b/src/mainboard/roda/rk886ex/romstage.c
@@ -279,11 +279,12 @@ void main(unsigned long bist)
enable_lapic();
}
- ich7_enable_lpc();
-
/* Force PCIRST# */
pci_write_config16(PCI_DEV(0, 0x1e, 0), BCTRL, SBR);
+ udelay(200 * 1000);
+ pci_write_config16(PCI_DEV(0, 0x1e, 0), BCTRL, 0);
+ ich7_enable_lpc();
early_superio_config();
/* Set up the console */