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| author | Stefan Reinauer <reinauer@chromium.org> | 2013-07-29 14:02:06 -0700 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-08-28 23:38:39 +0200 |
| commit | dedcc78ff44f4eb7c227ade84ee35e007f183a89 (patch) | |
| tree | 9bfdb368bd5eacac7cf0c90bb70b228fde283b77 /src/mainboard/samsung/lumpy/romstage.c | |
| parent | 5bdcff53749dc9397d40c0a7f9270cd3eb854ad3 (diff) | |
| download | coreboot-dedcc78ff44f4eb7c227ade84ee35e007f183a89.tar.xz | |
Fix up Stumpy/Lumpy PEI data for system agent r6
Change-Id: I79937fd1671af23184ab830d5ba6242c8067d944
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/3831
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/samsung/lumpy/romstage.c')
| -rw-r--r-- | src/mainboard/samsung/lumpy/romstage.c | 46 |
1 files changed, 22 insertions, 24 deletions
diff --git a/src/mainboard/samsung/lumpy/romstage.c b/src/mainboard/samsung/lumpy/romstage.c index be1411e8a9..449a81cb4c 100644 --- a/src/mainboard/samsung/lumpy/romstage.c +++ b/src/mainboard/samsung/lumpy/romstage.c @@ -146,33 +146,33 @@ void main(unsigned long bist) .hi = pci_read_config32(PCI_DEV(0, 0x1f, 2), 0xd0) }; #endif - struct pei_data pei_data = { - .pei_version = PEI_VERSION, - .mchbar = DEFAULT_MCHBAR, - .dmibar = DEFAULT_DMIBAR, - .epbar = DEFAULT_EPBAR, - .pciexbar = CONFIG_MMCONF_BASE_ADDRESS, - .smbusbar = SMBUS_IO_BASE, - .wdbbar = 0x4000000, - .wdbsize = 0x1000, - .hpet_address = CONFIG_HPET_ADDRESS, - .rcba = DEFAULT_RCBABASE, - .pmbase = DEFAULT_PMBASE, - .gpiobase = DEFAULT_GPIOBASE, - .thermalbase = 0xfed08000, - .system_type = 0, // 0 Mobile, 1 Desktop/Server - .tseg_size = CONFIG_SMM_TSEG_SIZE, - .spd_addresses = { 0x50, 0x00,0xf0,0x00 }, - .ts_addresses = { 0x30, 0x00, 0x00, 0x00 }, - .ec_present = 1, + pei_version: PEI_VERSION, + mchbar: DEFAULT_MCHBAR, + dmibar: DEFAULT_DMIBAR, + epbar: DEFAULT_EPBAR, + pciexbar: CONFIG_MMCONF_BASE_ADDRESS, + smbusbar: SMBUS_IO_BASE, + wdbbar: 0x4000000, + wdbsize: 0x1000, + hpet_address: CONFIG_HPET_ADDRESS, + rcba: DEFAULT_RCBABASE, + pmbase: DEFAULT_PMBASE, + gpiobase: DEFAULT_GPIOBASE, + thermalbase: 0xfed08000, + system_type: 0, // 0 Mobile, 1 Desktop/Server + tseg_size: CONFIG_SMM_TSEG_SIZE, + spd_addresses: { 0xa0, 0x00,0x00,0x00 }, + ts_addresses: { 0x30, 0x00, 0x00, 0x00 }, + ec_present: 1, // 0 = leave channel enabled // 1 = disable dimm 0 on channel // 2 = disable dimm 1 on channel // 3 = disable dimm 0+1 on channel - .dimm_channel0_disabled = 2, - .dimm_channel1_disabled = 2, - .usb_port_config = { + dimm_channel0_disabled: 2, + dimm_channel1_disabled: 2, + max_ddr3_freq: 1333, + usb_port_config: { { 1, 0, 0x0080 }, /* P0: Port 0 (OC0) */ { 1, 1, 0x0080 }, /* P1: Port 1 (OC1) */ { 1, 0, 0x0040 }, /* P2: MINIPCIE1 (no OC) */ @@ -188,8 +188,6 @@ void main(unsigned long bist) { 0, 4, 0x0000 }, /* P12: Empty */ { 0, 4, 0x0000 }, /* P13: Empty */ }, - .spd_data = { - } }; typedef const uint8_t spd_blob[256]; |