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| author | Nico Huber <nico.h@gmx.de> | 2019-11-17 01:24:44 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-11-18 11:51:10 +0000 |
| commit | 25128a79970bc9756ad33e1f1740e11321d1ff40 (patch) | |
| tree | 43ae7d1022ae9fb0857ce95b4f0d3ea60f28f7a0 /src/mainboard/samsung/lumpy | |
| parent | cc32a6980797abc5ce6365ce4c4c8c7418c8c224 (diff) | |
| download | coreboot-25128a79970bc9756ad33e1f1740e11321d1ff40.tar.xz | |
mb/samsung: Clean up LPC and IOAPIC configuration
Don't overwrite the LPC decode config of the generic PCH code, move
UART init into bootblock_mainboard_early_init() and don't enable the
IOAPIC, which is already done by generic code.
Change-Id: I90d090f5bff29174e68981fea3c3f04c666b1d28
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36895
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/mainboard/samsung/lumpy')
| -rw-r--r-- | src/mainboard/samsung/lumpy/early_init.c | 24 |
1 files changed, 4 insertions, 20 deletions
diff --git a/src/mainboard/samsung/lumpy/early_init.c b/src/mainboard/samsung/lumpy/early_init.c index 6bc545c57e..af4e55dc22 100644 --- a/src/mainboard/samsung/lumpy/early_init.c +++ b/src/mainboard/samsung/lumpy/early_init.c @@ -17,6 +17,7 @@ #include <stdint.h> #include <string.h> #include <arch/io.h> +#include <bootblock_common.h> #include <device/pci_ops.h> #include <device/pci_def.h> #include <cpu/x86/lapic.h> @@ -33,22 +34,10 @@ #include <superio/smsc/lpc47n207/lpc47n207.h> #endif -void mainboard_pch_lpc_setup(void) +void bootblock_mainboard_early_init(void) { - /* Set COM1/COM2 decode range */ - pci_write_config16(PCH_LPC_DEV, LPC_IO_DEC, 0x0010); - -#if CONFIG(DRIVERS_UART_8250IO) - /* Enable SuperIO + EC + KBC + COM1 + lpc47n207 config*/ - pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN | - KBC_LPC_EN | CNF2_LPC_EN | COMA_LPC_EN); - - try_enabling_LPC47N207_uart(); -#else - /* Enable SuperIO + EC + KBC */ - pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN | - KBC_LPC_EN); -#endif + if (CONFIG(DRIVERS_UART_8250IO)) + try_enabling_LPC47N207_uart(); } void mainboard_late_rcba_config(void) @@ -88,11 +77,6 @@ void mainboard_late_rcba_config(void) DIR_ROUTE(D26IR, PIRQB, PIRQC, PIRQD, PIRQA); DIR_ROUTE(D25IR, PIRQA, PIRQB, PIRQC, PIRQD); DIR_ROUTE(D22IR, PIRQA, PIRQB, PIRQC, PIRQD); - - /* Enable IOAPIC (generic) */ - RCBA16(OIC) = 0x0100; - /* PCH BWG says to read back the IOAPIC enable register */ - (void) RCBA16(OIC); } static const uint8_t *locate_spd(void) |