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author | Martin Roth <martinroth@google.com> | 2017-06-24 21:54:33 -0600 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2017-07-06 00:20:06 +0000 |
commit | 43927bae1846e0768cbfad717f4820f408cde82b (patch) | |
tree | 3752707f9ecc93f8d125682f6dfb89896ff5db15 /src/mainboard/samsung/lumpy | |
parent | 356b519049e6d40e15b2e4a85cae654e2e8df8ba (diff) | |
download | coreboot-43927bae1846e0768cbfad717f4820f408cde82b.tar.xz |
mainboard/[m-w]: add IS_ENABLED() around Kconfig symbol references
Change-Id: Ifba3257b0328d0b6ad1bee9bf885683998df5851
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20344
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard/samsung/lumpy')
-rw-r--r-- | src/mainboard/samsung/lumpy/acpi_tables.c | 2 | ||||
-rw-r--r-- | src/mainboard/samsung/lumpy/romstage.c | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/samsung/lumpy/acpi_tables.c b/src/mainboard/samsung/lumpy/acpi_tables.c index 828546c1b1..65922f3d92 100644 --- a/src/mainboard/samsung/lumpy/acpi_tables.c +++ b/src/mainboard/samsung/lumpy/acpi_tables.c @@ -25,7 +25,7 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <ec/acpi/ec.h> -#if CONFIG_CHROMEOS +#if IS_ENABLED(CONFIG_CHROMEOS) #include <vendorcode/google/chromeos/gnvs.h> #endif diff --git a/src/mainboard/samsung/lumpy/romstage.c b/src/mainboard/samsung/lumpy/romstage.c index 2a4bb4c6ea..3afb196448 100644 --- a/src/mainboard/samsung/lumpy/romstage.c +++ b/src/mainboard/samsung/lumpy/romstage.c @@ -38,7 +38,7 @@ #include <cpu/x86/msr.h> #include <halt.h> #include "option_table.h" -#if CONFIG_DRIVERS_UART_8250IO +#if IS_ENABLED(CONFIG_DRIVERS_UART_8250IO) #include <superio/smsc/lpc47n207/lpc47n207.h> #endif @@ -47,7 +47,7 @@ void pch_enable_lpc(void) /* Set COM1/COM2 decode range */ pci_write_config16(PCH_LPC_DEV, LPC_IO_DEC, 0x0010); -#if CONFIG_DRIVERS_UART_8250IO +#if IS_ENABLED(CONFIG_DRIVERS_UART_8250IO) /* Enable SuperIO + EC + KBC + COM1 + lpc47n207 config*/ pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN | KBC_LPC_EN | CNF2_LPC_EN | COMA_LPC_EN); |